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Commit f9e18304 authored by Govind Singh's avatar Govind Singh Committed by Kalle Valo
Browse files

ath10k: add copy engine register MAP for wcn3990 target 



Copy engine is a host to target communication interface
between wlan firmware and wlan wcn3990 platform driver. Add copy
engine register map for wcn3990 wlan module. This add support
for the copy engine source/destination ring configuration for
wcn3990 chipset.

Signed-off-by: default avatarGovind Singh <govinds@qti.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 641fe28a

drivers/net/wireless/ath/ath10k/core.c

+5 −0
Original line number Diff line number Diff line
@@ -2516,6 +2516,11 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 
		ar->hw_ce_regs = &qcax_ce_regs;

		ar->hw_values = &qca4019_values;

		break;

	case ATH10K_HW_WCN3990:

		ar->regs = &wcn3990_regs;

		ar->hw_ce_regs = &wcn3990_ce_regs;

		ar->hw_values = &wcn3990_values;

		break;

	default:

		ath10k_err(ar, "unsupported core hardware revision %d\n",

			   hw_rev);

drivers/net/wireless/ath/ath10k/hw.c

+150 −0
Original line number Diff line number Diff line
@@ -192,6 +192,156 @@ const struct ath10k_hw_values qca4019_values = { 
	.ce_desc_meta_data_lsb          = 4,

};



const struct ath10k_hw_regs wcn3990_regs = {

	.rtc_soc_base_address			= 0x00000000,

	.rtc_wmac_base_address			= 0x00000000,

	.soc_core_base_address			= 0x00000000,

	.ce_wrapper_base_address		= 0x0024C000,

	.ce0_base_address			= 0x00240000,

	.ce1_base_address			= 0x00241000,

	.ce2_base_address			= 0x00242000,

	.ce3_base_address			= 0x00243000,

	.ce4_base_address			= 0x00244000,

	.ce5_base_address			= 0x00245000,

	.ce6_base_address			= 0x00246000,

	.ce7_base_address			= 0x00247000,

	.ce8_base_address			= 0x00248000,

	.ce9_base_address			= 0x00249000,

	.ce10_base_address			= 0x0024A000,

	.ce11_base_address			= 0x0024B000,

	.soc_chip_id_address			= 0x000000f0,

	.soc_reset_control_si0_rst_mask		= 0x00000001,

	.soc_reset_control_ce_rst_mask		= 0x00000100,

	.ce_wrap_intr_sum_host_msi_lsb		= 0x0000000c,

	.ce_wrap_intr_sum_host_msi_mask		= 0x00fff000,

	.pcie_intr_fw_mask			= 0x00100000,

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_src_ring = {

	.msb	= 0x00000010,

	.lsb	= 0x00000010,

	.mask	= GENMASK(17, 17),

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_ring = {

	.msb	= 0x00000012,

	.lsb	= 0x00000012,

	.mask	= GENMASK(18, 18),

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_dmax = {

	.msb	= 0x00000000,

	.lsb	= 0x00000000,

	.mask	= GENMASK(15, 0),

};



static struct ath10k_hw_ce_ctrl1 wcn3990_ctrl1 = {

	.addr		= 0x00000018,

	.src_ring	= &wcn3990_src_ring,

	.dst_ring	= &wcn3990_dst_ring,

	.dmax		= &wcn3990_dmax,

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_host_ie_cc = {

	.mask	= GENMASK(0, 0),

};



static struct ath10k_hw_ce_host_ie wcn3990_host_ie = {

	.copy_complete	= &wcn3990_host_ie_cc,

};



static struct ath10k_hw_ce_host_wm_regs wcn3990_wm_reg = {

	.dstr_lmask	= 0x00000010,

	.dstr_hmask	= 0x00000008,

	.srcr_lmask	= 0x00000004,

	.srcr_hmask	= 0x00000002,

	.cc_mask	= 0x00000001,

	.wm_mask	= 0x0000001E,

	.addr		= 0x00000030,

};



static struct ath10k_hw_ce_misc_regs wcn3990_misc_reg = {

	.axi_err	= 0x00000100,

	.dstr_add_err	= 0x00000200,

	.srcr_len_err	= 0x00000100,

	.dstr_mlen_vio	= 0x00000080,

	.dstr_overflow	= 0x00000040,

	.srcr_overflow	= 0x00000020,

	.err_mask	= 0x000003E0,

	.addr		= 0x00000038,

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_low = {

	.msb	= 0x00000000,

	.lsb	= 0x00000010,

	.mask	= GENMASK(31, 16),

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_high = {

	.msb	= 0x0000000f,

	.lsb	= 0x00000000,

	.mask	= GENMASK(15, 0),

};



static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_src_ring = {

	.addr		= 0x0000004c,

	.low_rst	= 0x00000000,

	.high_rst	= 0x00000000,

	.wm_low		= &wcn3990_src_wm_low,

	.wm_high	= &wcn3990_src_wm_high,

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_low = {

	.lsb	= 0x00000010,

	.mask	= GENMASK(31, 16),

};



static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_high = {

	.msb	= 0x0000000f,

	.lsb	= 0x00000000,

	.mask	= GENMASK(15, 0),

};



static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_dst_ring = {

	.addr		= 0x00000050,

	.low_rst	= 0x00000000,

	.high_rst	= 0x00000000,

	.wm_low		= &wcn3990_dst_wm_low,

	.wm_high	= &wcn3990_dst_wm_high,

};



struct ath10k_hw_ce_regs wcn3990_ce_regs = {

	.sr_base_addr		= 0x00000000,

	.sr_size_addr		= 0x00000008,

	.dr_base_addr		= 0x0000000c,

	.dr_size_addr		= 0x00000014,

	.misc_ie_addr		= 0x00000034,

	.sr_wr_index_addr	= 0x0000003c,

	.dst_wr_index_addr	= 0x00000040,

	.current_srri_addr	= 0x00000044,

	.current_drri_addr	= 0x00000048,

	.ddr_addr_for_rri_low	= 0x00000004,

	.ddr_addr_for_rri_high	= 0x00000008,

	.ce_rri_low		= 0x0024C004,

	.ce_rri_high		= 0x0024C008,

	.host_ie_addr		= 0x0000002c,

	.ctrl1_regs		= &wcn3990_ctrl1,

	.host_ie		= &wcn3990_host_ie,

	.wm_regs		= &wcn3990_wm_reg,

	.misc_regs		= &wcn3990_misc_reg,

	.wm_srcr		= &wcn3990_wm_src_ring,

	.wm_dstr		= &wcn3990_wm_dst_ring,

};



const struct ath10k_hw_values wcn3990_values = {

	.rtc_state_val_on		= 5,

	.ce_count			= 12,

	.msi_assign_ce_max		= 12,

	.num_target_ce_config_wlan	= 12,

	.ce_desc_meta_data_mask		= 0xFFF0,

	.ce_desc_meta_data_lsb		= 4,

};



static struct ath10k_hw_ce_regs_addr_map qcax_src_ring = {

	.msb	= 0x00000010,

	.lsb	= 0x00000010,

drivers/net/wireless/ath/ath10k/hw.h

+9 −0
Original line number Diff line number Diff line
@@ -231,6 +231,7 @@ enum ath10k_hw_rev { 
	ATH10K_HW_QCA9377,

	ATH10K_HW_QCA4019,

	ATH10K_HW_QCA9887,

	ATH10K_HW_WCN3990,

};



struct ath10k_hw_regs {
@@ -247,6 +248,10 @@ struct ath10k_hw_regs { 
	u32 ce5_base_address;

	u32 ce6_base_address;

	u32 ce7_base_address;

	u32 ce8_base_address;

	u32 ce9_base_address;

	u32 ce10_base_address;

	u32 ce11_base_address;

	u32 soc_reset_control_si0_rst_mask;

	u32 soc_reset_control_ce_rst_mask;

	u32 soc_chip_id_address;
@@ -267,6 +272,7 @@ extern const struct ath10k_hw_regs qca988x_regs; 
extern const struct ath10k_hw_regs qca6174_regs;

extern const struct ath10k_hw_regs qca99x0_regs;

extern const struct ath10k_hw_regs qca4019_regs;

extern const struct ath10k_hw_regs wcn3990_regs;



struct ath10k_hw_ce_regs_addr_map {

	u32 msb;
@@ -362,6 +368,8 @@ extern const struct ath10k_hw_values qca6174_values; 
extern const struct ath10k_hw_values qca99x0_values;

extern const struct ath10k_hw_values qca9888_values;

extern const struct ath10k_hw_values qca4019_values;

extern const struct ath10k_hw_values wcn3990_values;

extern struct ath10k_hw_ce_regs wcn3990_ce_regs;

extern struct ath10k_hw_ce_regs qcax_ce_regs;



void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
@@ -375,6 +383,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey, 
#define QCA_REV_9984(ar) ((ar)->hw_rev == ATH10K_HW_QCA9984)

#define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)

#define QCA_REV_40XX(ar) ((ar)->hw_rev == ATH10K_HW_QCA4019)

#define QCA_REV_WCN3990(ar) ((ar)->hw_rev == ATH10K_HW_WCN3990)



/* Known peculiarities:

 *  - raw appears in nwifi decap, raw and nwifi appear in ethernet decap

drivers/net/wireless/ath/ath10k/pci.c

+4 −0
Original line number Diff line number Diff line
@@ -1597,6 +1597,8 @@ void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar) 
		 *  to mask irq/MSI.

		 */

		break;

	case ATH10K_HW_WCN3990:

		break;

	}

}
@@ -1623,6 +1625,8 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar) 
		 *  to unmask irq/MSI.

		 */

		break;

	case ATH10K_HW_WCN3990:

		break;

	}

}