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Commit f9dd2134 authored by Dan Williams's avatar Dan Williams
Browse files

Merge branch 'md-raid6-accel' into ioat3.2 

Conflicts:
	include/linux/dmaengine.h
parents 4b652f0d 07a3b417

Documentation/crypto/async-tx-api.txt

+45 −30
Original line number Original line Diff line number Diff line
@@ -54,20 +54,23 @@ features surfaced as a result: 




3.1 General format of the API:

3.1 General format of the API:

struct dma_async_tx_descriptor *

struct dma_async_tx_descriptor *

async_<operation>(<op specific parameters>,

async_<operation>(<op specific parameters>, struct async_submit ctl *submit)

		  enum async_tx_flags flags,

        	  struct dma_async_tx_descriptor *dependency,

        	  dma_async_tx_callback callback_routine,

		  void *callback_parameter);





3.2 Supported operations:

3.2 Supported operations:

memcpy  - memory copy between a source and a destination buffer

memcpy  - memory copy between a source and a destination buffer

memset  - fill a destination buffer with a byte value

memset  - fill a destination buffer with a byte value

xor     - xor a series of source buffers and write the result to a

xor     - xor a series of source buffers and write the result to a

	  destination buffer

	  destination buffer

xor_zero_sum - xor a series of source buffers and set a flag if the

xor_val - xor a series of source buffers and set a flag if the

	  result is zero.  The implementation attempts to prevent

	  result is zero.  The implementation attempts to prevent

	  writes to memory

	  writes to memory

pq	- generate the p+q (raid6 syndrome) from a series of source buffers

pq_val  - validate that a p and or q buffer are in sync with a given series of

	  sources

datap	- (raid6_datap_recov) recover a raid6 data block and the p block

	  from the given sources

2data	- (raid6_2data_recov) recover 2 raid6 data blocks from the given

	  sources





3.3 Descriptor management:

3.3 Descriptor management:

The return value is non-NULL and points to a 'descriptor' when the operation

The return value is non-NULL and points to a 'descriptor' when the operation
@@ -80,8 +83,8 @@ acknowledged by the application before the offload engine driver is allowed to 
recycle (or free) the descriptor.  A descriptor can be acked by one of the

recycle (or free) the descriptor.  A descriptor can be acked by one of the

following methods:

following methods:

1/ setting the ASYNC_TX_ACK flag if no child operations are to be submitted

1/ setting the ASYNC_TX_ACK flag if no child operations are to be submitted

2/ setting the ASYNC_TX_DEP_ACK flag to acknowledge the parent

2/ submitting an unacknowledged descriptor as a dependency to another

   descriptor of a new operation.

   async_tx call will implicitly set the acknowledged state.

3/ calling async_tx_ack() on the descriptor.

3/ calling async_tx_ack() on the descriptor.





3.4 When does the operation execute?

3.4 When does the operation execute?
@@ -119,12 +122,14 @@ of an operation. 
Perform a xor->copy->xor operation where each operation depends on the

Perform a xor->copy->xor operation where each operation depends on the

result from the previous operation:

result from the previous operation:





void complete_xor_copy_xor(void *param)

void callback(void *param)

{

{

	printk("complete\n");

	struct completion *cmp = param;



	complete(cmp);

}

}





int run_xor_copy_xor(struct page **xor_srcs,

void run_xor_copy_xor(struct page **xor_srcs,

		      int xor_src_cnt,

		      int xor_src_cnt,

		      struct page *xor_dest,

		      struct page *xor_dest,

		      size_t xor_len,

		      size_t xor_len,
@@ -133,16 +138,26 @@ int run_xor_copy_xor(struct page **xor_srcs, 
		      size_t copy_len)

		      size_t copy_len)

{

{

	struct dma_async_tx_descriptor *tx;

	struct dma_async_tx_descriptor *tx;

	addr_conv_t addr_conv[xor_src_cnt];

	struct async_submit_ctl submit;

	addr_conv_t addr_conv[NDISKS];

	struct completion cmp;



	init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL,

			  addr_conv);

	tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit)





	tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,

	submit->depend_tx = tx;

		       ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL);

	tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len, &submit);

	tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len,



			  ASYNC_TX_DEP_ACK, tx, NULL, NULL);

	init_completion(&cmp);

	tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,

	init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST | ASYNC_TX_ACK, tx,

		       ASYNC_TX_XOR_DROP_DST | ASYNC_TX_DEP_ACK | ASYNC_TX_ACK,

			  callback, &cmp, addr_conv);

		       tx, complete_xor_copy_xor, NULL);

	tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit);





	async_tx_issue_pending_all();

	async_tx_issue_pending_all();



	wait_for_completion(&cmp);

}

}





See include/linux/async_tx.h for more information on the flags.  See the

See include/linux/async_tx.h for more information on the flags.  See the

arch/arm/include/asm/hardware/iop3xx-adma.h

+3 −2
Original line number Original line Diff line number Diff line
@@ -756,13 +756,14 @@ static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc, 
	hw_desc->src[0] = val;

	hw_desc->src[0] = val;

}

}





static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)

static inline enum sum_check_flags

iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)

{

{

	struct iop3xx_desc_aau *hw_desc = desc->hw_desc;

	struct iop3xx_desc_aau *hw_desc = desc->hw_desc;

	struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;

	struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;





	iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));

	iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));

	return desc_ctrl.zero_result_err;

	return desc_ctrl.zero_result_err << SUM_CHECK_P;

}

}





static inline void iop_chan_append(struct iop_adma_chan *chan)

static inline void iop_chan_append(struct iop_adma_chan *chan)

arch/arm/mach-iop13xx/include/mach/adma.h

+7 −5
Original line number Original line Diff line number Diff line
@@ -428,18 +428,20 @@ static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc, 
	hw_desc->block_fill_data = val;

	hw_desc->block_fill_data = val;

}

}





static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)

static inline enum sum_check_flags

iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)

{

{

	struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;

	struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;

	struct iop13xx_adma_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;

	struct iop13xx_adma_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;

	struct iop13xx_adma_byte_count byte_count = hw_desc->byte_count_field;

	struct iop13xx_adma_byte_count byte_count = hw_desc->byte_count_field;

	enum sum_check_flags flags;





	BUG_ON(!(byte_count.tx_complete && desc_ctrl.zero_result));

	BUG_ON(!(byte_count.tx_complete && desc_ctrl.zero_result));





	if (desc_ctrl.pq_xfer_en)

	flags = byte_count.zero_result_err_q << SUM_CHECK_Q;

		return byte_count.zero_result_err_q;

	flags |= byte_count.zero_result_err << SUM_CHECK_P;

	else



		return byte_count.zero_result_err;

	return flags;

}

}





static inline void iop_chan_append(struct iop_adma_chan *chan)

static inline void iop_chan_append(struct iop_adma_chan *chan)

arch/arm/mach-iop13xx/setup.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -478,7 +478,7 @@ void __init iop13xx_platform_init(void) 
			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);

			dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
@@ -490,7 +490,7 @@ void __init iop13xx_platform_init(void) 
			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);

			dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
@@ -502,13 +502,13 @@ void __init iop13xx_platform_init(void) 
			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);

			dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMSET, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);

			dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);

			dma_cap_set(DMA_PQ_XOR, plat_data->cap_mask);

			dma_cap_set(DMA_PQ, plat_data->cap_mask);

			dma_cap_set(DMA_PQ_UPDATE, plat_data->cap_mask);

			dma_cap_set(DMA_PQ_UPDATE, plat_data->cap_mask);

			dma_cap_set(DMA_PQ_ZERO_SUM, plat_data->cap_mask);

			dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask);

			break;

			break;

		}

		}

	}

	}

arch/arm/plat-iop/adma.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -198,7 +198,7 @@ static int __init iop3xx_adma_cap_init(void) 
	dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);

	#else

	#else

	dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_ZERO_SUM, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_XOR_VAL, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);

	dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);

	#endif

	#endif