Merge "ARM: dts: msm: Enable PIL subsystems for sdmshrike" (f8839095) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/sdmshrike.dtsi

+83 −9

Original line number	Diff line number	Diff line
		@@ -1066,14 +1066,21 @@

		qcom,glink {
		compatible = "qcom,glink";
		modem {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		glink_modem: modem {
		qcom,remote-pid = <1>;
		transport = "smem";
		mboxes = <&apcs_glb 12>;
		mbox-names = "mpss_smem";
		interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;

		modem_qrtr {
		label = "modem";
		qcom,glink-label = "mpss";

		qcom,modem_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		@@ -1087,14 +1094,17 @@
		};
		};

		adsp {
		glink_adsp: adsp {
		qcom,remote-pid = <2>;
		transport = "smem";
		mboxes = <&apcs_glb 8>;
		mbox-names = "adsp_smem";
		interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;

		adsp_qrtr {
		label = "adsp";
		qcom,glink-label = "lpass";

		qcom,adsp_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		@@ -1113,14 +1123,17 @@
		};
		};

		dsps {
		glink_slpi: dsps {
		qcom,remote-pid = <3>;
		transport = "smem";
		mboxes = <&apcs_glb 24>;
		mbox-names = "dsps_smem";
		interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;

		dsps_qrtr {
		label = "slpi";
		qcom,glink-label = "dsps";

		qcom,slpi_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		@@ -1134,14 +1147,17 @@
		};
		};

		cdsp {
		glink_cdsp: cdsp {
		qcom,remote-pid = <5>;
		transport = "smem";
		mboxes = <&apcs_glb 4>;
		mbox-names = "cdsp_smem";
		interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;

		cdsp_qrtr {
		label = "cdsp";
		qcom,glink-label = "cdsp";

		qcom,cdsp_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		@@ -1160,6 +1176,9 @@
		transport = "spi";
		tx-descriptors = <0x12000 0x12004>;
		rx-descriptors = <0x1200c 0x12010>;

		label = "wdsp";
		qcom,glink-label = "wdsp";
		};
		};

		@@ -1451,9 +1470,12 @@
		/* Outputs to lpass */
		qcom,smem-states = <&adsp_smp2p_out 0>;
		qcom,smem-state-names = "qcom,force-stop";

		mboxes = <&qmp_aop 0>;
		mbox-names = "adsp-pil";
		};

		qcom,ssc@5c00000 {
		pil_ssc: qcom,ssc@5c00000 {
		compatible = "qcom,pil-tz-generic";
		reg = <0x5c00000 0x4000>;

		@@ -1492,6 +1514,53 @@
		/* Outputs to ssc */
		qcom,smem-states = <&dsps_smp2p_out 0>;
		qcom,smem-state-names = "qcom,force-stop";

		mboxes = <&qmp_aop 0>;
		mbox-names = "slpi-pil";
		};

		qcom,spss@1880000 {
		compatible = "qcom,pil-tz-generic";
		reg = <0x188101c 0x4>,
		<0x1881024 0x4>,
		<0x1881028 0x4>,
		<0x188103c 0x4>,
		<0x1882014 0x4>;
		reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",
		"sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";
		interrupts = <0 352 1>;

		vdd_cx-supply = <&VDD_CX_LEVEL>;
		qcom,proxy-reg-names = "vdd_cx";
		vdd_mx-supply = <&VDD_MX_LEVEL>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;
		clock-names = "xo";
		qcom,proxy-clock-names = "xo";
		qcom,pil-generic-irq-handler;
		status = "ok";
		qcom,signal-aop;
		qcom,complete-ramdump;

		qcom,pas-id = <14>;
		qcom,proxy-timeout-ms = <10000>;
		qcom,firmware-name = "spss";
		memory-region = <&pil_spss_mem>;
		qcom,spss-scsr-bits = <24 25>;

		mboxes = <&qmp_aop 0>;
		mbox-names = "spss-pil";
		};

		qcom,npu@0x9800000 {
		compatible = "qcom,pil-tz-generic";
		reg = <0x9800000 0x800000>;

		status = "ok";
		qcom,pas-id = <23>;
		qcom,firmware-name = "npu";

		memory-region = <&pil_npu_mem>;
		};

		qcom,turing@8300000 {
		@@ -1512,6 +1581,8 @@
		qcom,ssctl-instance-id = <0x17>;
		qcom,firmware-name = "cdsp";
		memory-region = <&pil_cdsp_mem>;
		qcom,signal-aop;
		qcom,complete-ramdump;

		qcom,msm-bus,name = "pil-cdsp";
		qcom,msm-bus,num-cases = <2>;
		@@ -1536,6 +1607,9 @@
		/* Outputs to turing */
		qcom,smem-states = <&cdsp_smp2p_out 0>;
		qcom,smem-state-names = "qcom,force-stop";

		mboxes = <&qmp_aop 0>;
		mbox-names = "cdsp-pil";
		};

		wdog: qcom,wdt@17c10000 {