Loading arch/mips/mm/c-r3k.c +3 −3 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static unsigned long icache_size, dcache_size; /* Size in bytes */ static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */ unsigned long __init r3k_cache_size(unsigned long ca_flags) unsigned long __cpuinit r3k_cache_size(unsigned long ca_flags) { unsigned long flags, status, dummy, size; volatile unsigned long *p; Loading Loading @@ -61,7 +61,7 @@ unsigned long __init r3k_cache_size(unsigned long ca_flags) return size * sizeof(*p); } unsigned long __init r3k_cache_lsize(unsigned long ca_flags) unsigned long __cpuinit r3k_cache_lsize(unsigned long ca_flags) { unsigned long flags, status, lsize, i; volatile unsigned long *p; Loading Loading @@ -90,7 +90,7 @@ unsigned long __init r3k_cache_lsize(unsigned long ca_flags) return lsize * sizeof(*p); } static void __init r3k_probe_cache(void) static void __cpuinit r3k_probe_cache(void) { dcache_size = r3k_cache_size(ST0_ISC); if (dcache_size) Loading arch/mips/mm/page.c +32 −29 Original line number Diff line number Diff line Loading @@ -235,13 +235,12 @@ static void __cpuinit set_prefetch_parameters(void) } /* * Too much unrolling will overflow the available space in * clear_space_array / copy_page_array. 8 words sounds generous, * but a R4000 with 128 byte L2 line length can exceed even that. * clear_space_array / copy_page_array. */ half_clear_loop_size = min(8 * clear_word_size, half_clear_loop_size = min(16 * clear_word_size, max(cache_line_size >> 1, 4 * clear_word_size)); half_copy_loop_size = min(8 * copy_word_size, half_copy_loop_size = min(16 * copy_word_size, max(cache_line_size >> 1, 4 * copy_word_size)); } Loading @@ -263,7 +262,8 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off) if (pref_bias_clear_store) { uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off, A0); } else if (cpu_has_cache_cdex_s) { } else if (cache_line_size == (half_clear_loop_size << 1)) { if (cpu_has_cache_cdex_s) { uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); } else if (cpu_has_cache_cdex_p) { if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { Loading @@ -279,6 +279,7 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off) uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); } } } void __cpuinit build_clear_page(void) { Loading Loading @@ -403,7 +404,8 @@ static inline void build_copy_store_pref(u32 **buf, int off) if (pref_bias_copy_store) { uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off, A0); } else if (cpu_has_cache_cdex_s) { } else if (cache_line_size == (half_copy_loop_size << 1)) { if (cpu_has_cache_cdex_s) { uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); } else if (cpu_has_cache_cdex_p) { if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { Loading @@ -419,6 +421,7 @@ static inline void build_copy_store_pref(u32 **buf, int off) uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); } } } void __cpuinit build_copy_page(void) { Loading arch/mips/mm/sc-rm7k.c +2 −2 Original line number Diff line number Diff line Loading @@ -86,7 +86,7 @@ static void rm7k_sc_inv(unsigned long addr, unsigned long size) /* * This function is executed in uncached address space. */ static __init void __rm7k_sc_enable(void) static __cpuinit void __rm7k_sc_enable(void) { int i; Loading @@ -107,7 +107,7 @@ static __init void __rm7k_sc_enable(void) } } static __init void rm7k_sc_enable(void) static __cpuinit void rm7k_sc_enable(void) { if (read_c0_config() & RM7K_CONF_SE) return; Loading arch/powerpc/kernel/legacy_serial.c +3 −2 Original line number Diff line number Diff line Loading @@ -33,13 +33,14 @@ static struct legacy_serial_info { phys_addr_t taddr; } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; static struct __initdata of_device_id parents[] = { static struct __initdata of_device_id legacy_serial_parents[] = { {.type = "soc",}, {.type = "tsi-bridge",}, {.type = "opb", }, {.compatible = "ibm,opb",}, {.compatible = "simple-bus",}, {.compatible = "wrs,epld-localbus",}, {}, }; static unsigned int legacy_serial_count; Loading Loading @@ -327,7 +328,7 @@ void __init find_legacy_serial_ports(void) struct device_node *parent = of_get_parent(np); if (!parent) continue; if (of_match_node(parents, parent) != NULL) { if (of_match_node(legacy_serial_parents, parent) != NULL) { index = add_legacy_soc_port(np, np); if (index >= 0 && np == stdout) legacy_serial_console = index; Loading arch/um/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -77,7 +77,6 @@ include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS) KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \ -Dmktime=kernel_mktime $(ARCH_KERNEL_DEFINES)) KBUILD_CFLAGS += $(KERNEL_DEFINES) KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,) PHONY += linux Loading Loading
arch/mips/mm/c-r3k.c +3 −3 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static unsigned long icache_size, dcache_size; /* Size in bytes */ static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */ unsigned long __init r3k_cache_size(unsigned long ca_flags) unsigned long __cpuinit r3k_cache_size(unsigned long ca_flags) { unsigned long flags, status, dummy, size; volatile unsigned long *p; Loading Loading @@ -61,7 +61,7 @@ unsigned long __init r3k_cache_size(unsigned long ca_flags) return size * sizeof(*p); } unsigned long __init r3k_cache_lsize(unsigned long ca_flags) unsigned long __cpuinit r3k_cache_lsize(unsigned long ca_flags) { unsigned long flags, status, lsize, i; volatile unsigned long *p; Loading Loading @@ -90,7 +90,7 @@ unsigned long __init r3k_cache_lsize(unsigned long ca_flags) return lsize * sizeof(*p); } static void __init r3k_probe_cache(void) static void __cpuinit r3k_probe_cache(void) { dcache_size = r3k_cache_size(ST0_ISC); if (dcache_size) Loading
arch/mips/mm/page.c +32 −29 Original line number Diff line number Diff line Loading @@ -235,13 +235,12 @@ static void __cpuinit set_prefetch_parameters(void) } /* * Too much unrolling will overflow the available space in * clear_space_array / copy_page_array. 8 words sounds generous, * but a R4000 with 128 byte L2 line length can exceed even that. * clear_space_array / copy_page_array. */ half_clear_loop_size = min(8 * clear_word_size, half_clear_loop_size = min(16 * clear_word_size, max(cache_line_size >> 1, 4 * clear_word_size)); half_copy_loop_size = min(8 * copy_word_size, half_copy_loop_size = min(16 * copy_word_size, max(cache_line_size >> 1, 4 * copy_word_size)); } Loading @@ -263,7 +262,8 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off) if (pref_bias_clear_store) { uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off, A0); } else if (cpu_has_cache_cdex_s) { } else if (cache_line_size == (half_clear_loop_size << 1)) { if (cpu_has_cache_cdex_s) { uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); } else if (cpu_has_cache_cdex_p) { if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { Loading @@ -279,6 +279,7 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off) uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); } } } void __cpuinit build_clear_page(void) { Loading Loading @@ -403,7 +404,8 @@ static inline void build_copy_store_pref(u32 **buf, int off) if (pref_bias_copy_store) { uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off, A0); } else if (cpu_has_cache_cdex_s) { } else if (cache_line_size == (half_copy_loop_size << 1)) { if (cpu_has_cache_cdex_s) { uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); } else if (cpu_has_cache_cdex_p) { if (R4600_V1_HIT_CACHEOP_WAR && cpu_is_r4600_v1_x()) { Loading @@ -419,6 +421,7 @@ static inline void build_copy_store_pref(u32 **buf, int off) uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); } } } void __cpuinit build_copy_page(void) { Loading
arch/mips/mm/sc-rm7k.c +2 −2 Original line number Diff line number Diff line Loading @@ -86,7 +86,7 @@ static void rm7k_sc_inv(unsigned long addr, unsigned long size) /* * This function is executed in uncached address space. */ static __init void __rm7k_sc_enable(void) static __cpuinit void __rm7k_sc_enable(void) { int i; Loading @@ -107,7 +107,7 @@ static __init void __rm7k_sc_enable(void) } } static __init void rm7k_sc_enable(void) static __cpuinit void rm7k_sc_enable(void) { if (read_c0_config() & RM7K_CONF_SE) return; Loading
arch/powerpc/kernel/legacy_serial.c +3 −2 Original line number Diff line number Diff line Loading @@ -33,13 +33,14 @@ static struct legacy_serial_info { phys_addr_t taddr; } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; static struct __initdata of_device_id parents[] = { static struct __initdata of_device_id legacy_serial_parents[] = { {.type = "soc",}, {.type = "tsi-bridge",}, {.type = "opb", }, {.compatible = "ibm,opb",}, {.compatible = "simple-bus",}, {.compatible = "wrs,epld-localbus",}, {}, }; static unsigned int legacy_serial_count; Loading Loading @@ -327,7 +328,7 @@ void __init find_legacy_serial_ports(void) struct device_node *parent = of_get_parent(np); if (!parent) continue; if (of_match_node(parents, parent) != NULL) { if (of_match_node(legacy_serial_parents, parent) != NULL) { index = add_legacy_soc_port(np, np); if (index >= 0 && np == stdout) legacy_serial_console = index; Loading
arch/um/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -77,7 +77,6 @@ include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS) KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \ -Dmktime=kernel_mktime $(ARCH_KERNEL_DEFINES)) KBUILD_CFLAGS += $(KERNEL_DEFINES) KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,) PHONY += linux Loading