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Commit f862b315 authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Vineet Gupta
Browse files

ARC: [plat-axs10x]: prepare dts files for enabling PAE40 on axs103 



Enable 64bit adressing, where it needed, to make possible
enabling PAE40 on axs103.

This patch doesn't affect on any functionality.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 29178c14

arch/arc/boot/dts/axc001.dtsi

+9 −11
Original line number Diff line number Diff line
@@ -15,15 +15,15 @@ 


/ {

	compatible = "snps,arc";

	#address-cells = <1>;

	#size-cells = <1>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpu_card {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x00000000 0xf0000000 0x10000000>;

		ranges = <0x00000000 0x0 0xf0000000 0x10000000>;



		core_clk: core_clk {

			#clock-cells = <0>;
@@ -91,23 +91,21 @@ 
	mb_intc: dw-apb-ictl@0xe0012000 {

		#interrupt-cells = <1>;

		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		reg = < 0x0 0xe0012000 0x0 0x200 >;

		interrupt-controller;

		interrupt-parent = <&core_intc>;

		interrupts = < 7 >;

	};



	memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x20000000>;

		device_type = "memory";

		reg = <0x80000000 0x1b000000>;	/* (512 - 32) MiB */

		/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */

		reg = <0x0 0x80000000 0x0 0x1b000000>;	/* (512 - 32) MiB */

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		/*

		 * We just move frame buffer area to the very end of
@@ -118,7 +116,7 @@ 
		 */

		frame_buffer: frame_buffer@9e000000 {

			compatible = "shared-dma-pool";

			reg = <0x9e000000 0x2000000>;

			reg = <0x0 0x9e000000 0x0 0x2000000>;

			no-map;

		};

	};

arch/arc/boot/dts/axc003.dtsi

+10 −11
Original line number Diff line number Diff line
@@ -14,15 +14,15 @@ 


/ {

	compatible = "snps,arc";

	#address-cells = <1>;

	#size-cells = <1>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpu_card {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x00000000 0xf0000000 0x10000000>;

		ranges = <0x00000000 0x0 0xf0000000 0x10000000>;



		core_clk: core_clk {

			#clock-cells = <0>;
@@ -94,30 +94,29 @@ 
	mb_intc: dw-apb-ictl@0xe0012000 {

		#interrupt-cells = <1>;

		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		reg = < 0x0 0xe0012000 0x0 0x200 >;

		interrupt-controller;

		interrupt-parent = <&core_intc>;

		interrupts = < 24 >;

	};



	memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x40000000>;

		device_type = "memory";

		reg = <0x80000000 0x20000000>;	/* 512MiB */

		/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */

		reg = <0x0 0x80000000 0x0 0x20000000	/* 512 MiB low mem */

		       0x1 0xc0000000 0x0 0x40000000>;	/* 1 GiB highmem */

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		/*

		 * Move frame buffer out of IOC aperture (0x8z-0xAz).

		 */

		frame_buffer: frame_buffer@be000000 {

			compatible = "shared-dma-pool";

			reg = <0xbe000000 0x2000000>;

			reg = <0x0 0xbe000000 0x0 0x2000000>;

			no-map;

		};

	};

arch/arc/boot/dts/axc003_idu.dtsi

+10 −11
Original line number Diff line number Diff line
@@ -14,15 +14,15 @@ 


/ {

	compatible = "snps,arc";

	#address-cells = <1>;

	#size-cells = <1>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpu_card {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x00000000 0xf0000000 0x10000000>;

		ranges = <0x00000000 0x0 0xf0000000 0x10000000>;



		core_clk: core_clk {

			#clock-cells = <0>;
@@ -100,30 +100,29 @@ 
	mb_intc: dw-apb-ictl@0xe0012000 {

		#interrupt-cells = <1>;

		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		reg = < 0x0 0xe0012000 0x0 0x200 >;

		interrupt-controller;

		interrupt-parent = <&idu_intc>;

		interrupts = <0>;

	};



	memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x40000000>;

		device_type = "memory";

		reg = <0x80000000 0x20000000>;	/* 512MiB */

		/* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */

		reg = <0x0 0x80000000 0x0 0x20000000	/* 512 MiB low mem */

		       0x1 0xc0000000 0x0 0x40000000>;	/* 1 GiB highmem */

	};



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		/*

		 * Move frame buffer out of IOC aperture (0x8z-0xAz).

		 */

		frame_buffer: frame_buffer@be000000 {

			compatible = "shared-dma-pool";

			reg = <0xbe000000 0x2000000>;

			reg = <0x0 0xbe000000 0x0 0x2000000>;

			no-map;

		};

	};

arch/arc/boot/dts/axs10x_mb.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ 
		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0xe0000000 0x10000000>;

		ranges = <0x00000000 0x0 0xe0000000 0x10000000>;

		interrupt-parent = <&mb_intc>;



		i2sclk: i2sclk@100a0 {