Loading arch/arm64/boot/dts/qcom/qcs405.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -647,6 +647,11 @@ memory-region = <&adsp_mem>; }; qcom,smp2p_sleepstate { compatible = "qcom,smp2p-sleepstate"; qcom,smem-states = <&sleepstate_smp2p_out 0>; }; qcom,msm_fastrpc { compatible = "qcom,msm-fastrpc-compute"; qcom,rpc-latency-us = <611>; Loading Loading @@ -895,6 +900,11 @@ interrupt-controller; #interrupt-cells = <2>; }; sleepstate_smp2p_out: sleepstate-out { qcom,entry-name = "sleepstate"; #qcom,smem-state-cells = <1>; }; }; qcom,smp2p-cdsp { Loading Loading
arch/arm64/boot/dts/qcom/qcs405.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -647,6 +647,11 @@ memory-region = <&adsp_mem>; }; qcom,smp2p_sleepstate { compatible = "qcom,smp2p-sleepstate"; qcom,smem-states = <&sleepstate_smp2p_out 0>; }; qcom,msm_fastrpc { compatible = "qcom,msm-fastrpc-compute"; qcom,rpc-latency-us = <611>; Loading Loading @@ -895,6 +900,11 @@ interrupt-controller; #interrupt-cells = <2>; }; sleepstate_smp2p_out: sleepstate-out { qcom,entry-name = "sleepstate"; #qcom,smem-state-cells = <1>; }; }; qcom,smp2p-cdsp { Loading