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Commit f83e796e authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "mhi: core: allow MHI control driver to set MHI device state"

parents 9f48411f 165de74e

arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi

+794 −782
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		mhi_channels {

			mhi_chan@0 {

				reg = <0>;

				label = "LOOPBACK";
@@ -357,7 +358,9 @@ 
				mhi,offload-chan;

				mhi,lpm-notify;

			};

		};



		mhi_events {

				mhi_event@0 {

				mhi,num-elements = <32>;

				mhi,intmod = <1>;
@@ -411,7 +414,9 @@ 
				mhi,hw-ev;

				mhi,client-manage;

			};

		};



		mhi_devices {

			mhi_netdev_0: mhi_rmnet@0 {

				reg = <0x0>;

				mhi,chan = "IP_HW0";
@@ -427,6 +432,7 @@ 
			};

		};

	};

};



&pcie_rc0 {

	reg = <0 0 0 0 0>;
@@ -450,6 +456,7 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		mhi_channels {

			mhi_chan@0 {

				reg = <0>;

				label = "LOOPBACK";
@@ -774,7 +781,9 @@ 
				mhi,offload-chan;

				mhi,lpm-notify;

			};

		};



		mhi_events {

				mhi_event@0 {

				mhi,num-elements = <32>;

				mhi,intmod = <1>;
@@ -828,7 +837,9 @@ 
				mhi,hw-ev;

				mhi,client-manage;

			};

		};



		mhi_devices {

			mhi_netdev_2: mhi_rmnet@0 {

				reg = <0x0>;

				mhi,chan = "IP_HW0";
@@ -844,3 +855,4 @@ 
			};

		};

	};

};

arch/arm64/boot/dts/qcom/sm8150-sdx50m.dtsi

+81 −61
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
	mhi,buffer-len = <0x8000>;

	qcom,addr-win = <0x0 0xa0000000 0x0 0xa4bfffff>;



	mhi_channels {

		mhi_chan@1 {

			mhi,num-elements = <32>;

		};
@@ -47,7 +48,9 @@ 
		mhi_chan@101 {

			status = "disabled";

		};

	};



	mhi_events {

		mhi_event@4 {

			mhi,num-elements = <0>;

			mhi,intmod = <0>;
@@ -72,8 +75,22 @@ 
			mhi,offload;

		};

	};

};



&mhi_1 {

	mhi_channels {

		mhi_chan@1 {

			mhi,num-elements = <32>;

		};



		mhi_chan@11 {

			mhi,num-elements = <32>;

		};



		mhi_chan@21 {

			mhi,num-elements = <32>;

		};



		mhi_chan@100 {

			status = "disabled";

		};
@@ -81,7 +98,9 @@ 
		mhi_chan@101 {

			status = "disabled";

		};

	};



	mhi_events {

		mhi_event@4 {

			mhi,num-elements = <0>;

			mhi,intmod = <0>;
@@ -106,6 +125,7 @@ 
			mhi,offload;

		};

	};

};



&tlmm {

	pcie1 {

drivers/bus/mhi/core/mhi_init.c

+8 −0
Original line number Diff line number Diff line
@@ -781,6 +781,10 @@ static int of_parse_ev_cfg(struct mhi_controller *mhi_cntrl, 
	struct mhi_event *mhi_event;

	struct device_node *child;



	of_node = of_find_node_by_name(of_node, "mhi_events");

	if (!of_node)

		return -EINVAL;



	for_each_available_child_of_node(of_node, child) {

		if (!strcmp(child->name, "mhi_event"))

			num++;
@@ -896,6 +900,10 @@ static int of_parse_ch_cfg(struct mhi_controller *mhi_cntrl, 
	if (ret)

		return ret;



	of_node = of_find_node_by_name(of_node, "mhi_channels");

	if (!of_node)

		return -EINVAL;



	mhi_cntrl->mhi_chan = kcalloc(mhi_cntrl->max_chan,

				      sizeof(*mhi_cntrl->mhi_chan), GFP_KERNEL);

	if (!mhi_cntrl->mhi_chan)

drivers/bus/mhi/core/mhi_internal.h

+0 −3
Original line number Diff line number Diff line
@@ -655,7 +655,6 @@ const char *to_mhi_pm_state_str(enum MHI_PM_STATE state); 
void mhi_reset_chan(struct mhi_controller *mhi_cntrl,

		    struct mhi_chan *mhi_chan);

enum mhi_ee mhi_get_exec_env(struct mhi_controller *mhi_cntrl);

enum mhi_dev_state mhi_get_m_state(struct mhi_controller *mhi_cntrl);

int mhi_queue_state_transition(struct mhi_controller *mhi_cntrl,

			       enum MHI_ST_TRANSITION state);

void mhi_pm_st_worker(struct work_struct *work);
@@ -711,8 +710,6 @@ void mhi_write_db(struct mhi_controller *mhi_cntrl, void __iomem *db_addr, 
void mhi_ring_cmd_db(struct mhi_controller *mhi_cntrl, struct mhi_cmd *mhi_cmd);

void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,

		      struct mhi_chan *mhi_chan);

void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,

		       enum mhi_dev_state state);

int mhi_get_capability_offset(struct mhi_controller *mhi_cntrl, u32 capability,

			      u32 *offset);

int mhi_init_timesync(struct mhi_controller *mhi_cntrl);

drivers/bus/mhi/core/mhi_main.c

+7 −4
Original line number Diff line number Diff line
@@ -190,7 +190,7 @@ enum mhi_ee mhi_get_exec_env(struct mhi_controller *mhi_cntrl) 
	return (ret) ? MHI_EE_MAX : exec;

}



enum mhi_dev_state mhi_get_m_state(struct mhi_controller *mhi_cntrl)

enum mhi_dev_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl)

{

	u32 state;

	int ret = mhi_read_reg_field(mhi_cntrl, mhi_cntrl->regs, MHISTATUS,
@@ -592,7 +592,10 @@ static void mhi_assign_of_node(struct mhi_controller *mhi_cntrl, 
	const char *dt_name;

	int ret;



	controller = mhi_cntrl->of_node;

	controller = of_find_node_by_name(mhi_cntrl->of_node, "mhi_devices");

	if (!controller)

		return;



	for_each_available_child_of_node(controller, node) {

		ret = of_property_read_string(node, "mhi,chan", &dt_name);

		if (ret)
@@ -1238,7 +1241,7 @@ void mhi_ctrl_ev_task(unsigned long data) 
	if (!ret) {

		write_lock_irq(&mhi_cntrl->pm_lock);

		if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state))

			state = mhi_get_m_state(mhi_cntrl);

			state = mhi_get_mhi_state(mhi_cntrl);

		if (state == MHI_STATE_SYS_ERR) {

			MHI_ERR("MHI system error detected\n");

			pm_state = mhi_tryset_pm_state(mhi_cntrl,
@@ -1287,7 +1290,7 @@ irqreturn_t mhi_intvec_threaded_handlr(int irq_number, void *dev) 


	write_lock_irq(&mhi_cntrl->pm_lock);

	if (MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state))

		state = mhi_get_m_state(mhi_cntrl);

		state = mhi_get_mhi_state(mhi_cntrl);

	if (state == MHI_STATE_SYS_ERR) {

		MHI_ERR("MHI system error detected\n");

		pm_state = mhi_tryset_pm_state(mhi_cntrl,