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Commit f811e500 authored by Shefali Jain's avatar Shefali Jain Committed by Gerrit - the friendly Code Review server
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defconfig: Enable CMN BLK PLL driver for QCS405 



Enable Common Block PLL driver for QCS405.

Change-Id: I46e16aac8e78dfb91233f44d7b61dbe655c26989
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent 7dab6c35

arch/arm/configs/vendor/qcs405-perf_defconfig

+1 −1
Original line number Diff line number Diff line
@@ -262,9 +262,9 @@ CONFIG_SPS_SUPPORT_NDP_BAM=y 
CONFIG_COMMON_CLK_QCOM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_CLOCK_CPU_QCS405=y

CONFIG_QCS_CMN_BLK_PLL=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

arch/arm/configs/vendor/qcs405_defconfig

+1 −1
Original line number Diff line number Diff line
@@ -417,9 +417,9 @@ CONFIG_QCOM_MDSS_PLL=y 
CONFIG_COMMON_CLK_QCOM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_CLOCK_CPU_QCS405=y

CONFIG_QCS_CMN_BLK_PLL=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

arch/arm64/configs/vendor/qcs405-perf_defconfig

+1 −1
Original line number Diff line number Diff line
@@ -415,9 +415,9 @@ CONFIG_SPS_SUPPORT_NDP_BAM=y 
CONFIG_QCOM_MDSS_PLL=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_CLOCK_CPU_QCS405=y

CONFIG_QCS_CMN_BLK_PLL=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y

arch/arm64/configs/vendor/qcs405_defconfig

+1 −1
Original line number Diff line number Diff line
@@ -425,9 +425,9 @@ CONFIG_SPS_SUPPORT_NDP_BAM=y 
CONFIG_QCOM_MDSS_PLL=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_SPMI_PMIC_CLKDIV=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_CLOCK_CPU_QCS405=y

CONFIG_QCS_CMN_BLK_PLL=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y