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Commit f80c738c authored by Tom St Denis's avatar Tom St Denis Committed by Alex Deucher
Browse files

drm/amd/amdgpu: Tidy up SI SMC code (v2) 

As well as merge SMC clock functions into one to reduce LOC.

v2: Fix swapped ck enable bit
bug: https://bugs.freedesktop.org/show_bug.cgi?id=97801



Signed-off-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarEdward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6e9057a8

drivers/gpu/drm/amd/amdgpu/si_dpm.c

+3 −3
Original line number Diff line number Diff line
@@ -3944,13 +3944,13 @@ static void si_dpm_start_smc(struct amdgpu_device *adev) 
{

	si_program_jump_on_start(adev);

	si_start_smc(adev);

	si_start_smc_clock(adev);

	si_smc_clock(adev, true);

}



static void si_dpm_stop_smc(struct amdgpu_device *adev)

{

	si_reset_smc(adev);

	si_stop_smc_clock(adev);

	si_smc_clock(adev, false);

}



static int si_process_firmware_header(struct amdgpu_device *adev)
@@ -4366,7 +4366,7 @@ static int si_upload_firmware(struct amdgpu_device *adev) 
	struct si_power_info *si_pi = si_get_pi(adev);



	si_reset_smc(adev);

	si_stop_smc_clock(adev);

	si_smc_clock(adev, false);



	return si_load_smc_ucode(adev, si_pi->sram_end);

}

drivers/gpu/drm/amd/amdgpu/si_smc.c

+8 −17
Original line number Diff line number Diff line
@@ -84,7 +84,6 @@ int si_copy_bytes_to_smc(struct amdgpu_device *adev, 
			goto done;



		original_data = RREG32(SMC_IND_DATA_0);



		extra_shift = 8 * (4 - byte_count);



		while (byte_count > 0) {
@@ -94,7 +93,6 @@ int si_copy_bytes_to_smc(struct amdgpu_device *adev, 
		}



		data <<= extra_shift;



		data |= (original_data & ~((~0UL) << extra_shift));



		ret = si_set_smc_sram_address(adev, addr, limit);
@@ -128,8 +126,8 @@ void si_reset_smc(struct amdgpu_device *adev) 
	RREG32(CB_CGTT_SCLK_CTRL);

	RREG32(CB_CGTT_SCLK_CTRL);



	tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);

	tmp |= RST_REG;

	tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL) |

	      RST_REG;

	WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

}
@@ -140,20 +138,14 @@ int si_program_jump_on_start(struct amdgpu_device *adev) 
	return si_copy_bytes_to_smc(adev, 0x0, data, 4, sizeof(data)+1);

}



void si_stop_smc_clock(struct amdgpu_device *adev)

{

	u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);



	tmp |= CK_DISABLE;



	WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

}



void si_start_smc_clock(struct amdgpu_device *adev)

void si_smc_clock(struct amdgpu_device *adev, bool enable)

{

	u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);



	if (enable)

		tmp &= ~CK_DISABLE;

	else

		tmp |= CK_DISABLE;



	WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);

}
@@ -185,9 +177,8 @@ PPSMC_Result si_send_msg_to_smc(struct amdgpu_device *adev, PPSMC_Msg msg) 
			break;

		udelay(1);

	}

	tmp = RREG32(SMC_RESP_0);



	return (PPSMC_Result)tmp;

	return (PPSMC_Result)RREG32(SMC_RESP_0);

}



PPSMC_Result si_wait_for_smc_inactive(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/sislands_smc.h

+1 −2
Original line number Diff line number Diff line
@@ -408,8 +408,7 @@ int si_copy_bytes_to_smc(struct amdgpu_device *adev, 
void si_start_smc(struct amdgpu_device *adev);

void si_reset_smc(struct amdgpu_device *adev);

int si_program_jump_on_start(struct amdgpu_device *adev);

void si_stop_smc_clock(struct amdgpu_device *adev);

void si_start_smc_clock(struct amdgpu_device *adev);

void si_smc_clock(struct amdgpu_device *adev, bool enable);

bool si_is_smc_running(struct amdgpu_device *adev);

PPSMC_Result si_send_msg_to_smc(struct amdgpu_device *adev, PPSMC_Msg msg);

PPSMC_Result si_wait_for_smc_inactive(struct amdgpu_device *adev);