Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f7e0efc9 authored by Jean-Philippe Brucker's avatar Jean-Philippe Brucker Committed by Will Deacon
Browse files

arm64: update ASID limit 



During a rollover, we mark the active ASID on each CPU as reserved, before
allocating a new ID for the task that caused the rollover. This means that
with N CPUs, we can only guarantee the new task to obtain a valid ASID if
we have at least N+1 ASIDs. Update this limit in the initcall check.

Note that this restriction was introduced by commit 8e648066 on the
arch/arm side, which disallow re-using the previously active ASID on the
local CPU, as it would introduce a TLB race.

In addition, we only dispose of NUM_USER_ASIDS-1, since ASID 0 is
reserved. Add this restriction as well.

Signed-off-by: default avatarJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 33688abb

arch/arm64/mm/context.c

+6 −3
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu) 
						 &asid_generation);

	flush_context(cpu);



	/* We have at least 1 ASID per CPU, so this will always succeed */

	/* We have more ASIDs than CPUs, so this will always succeed */

	asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);



set_asid:
@@ -227,8 +227,11 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu) 
static int asids_init(void)

{

	asid_bits = get_cpu_asid_bits();

	/* If we end up with more CPUs than ASIDs, expect things to crash */

	WARN_ON(NUM_USER_ASIDS < num_possible_cpus());

	/*

	 * Expect allocation after rollover to fail if we don't have at least

	 * one more ASID than CPUs. ASID #0 is reserved for init_mm.

	 */

	WARN_ON(NUM_USER_ASIDS - 1 <= num_possible_cpus());

	atomic64_set(&asid_generation, ASID_FIRST_VERSION);

	asid_map = kzalloc(BITS_TO_LONGS(NUM_USER_ASIDS) * sizeof(*asid_map),

			   GFP_KERNEL);