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Commit f7b2b3be authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Add clock measure support for qpic clock for sdxprairie"

parents 33389a31 7ed866f2

drivers/clk/qcom/clk-rpmh.c

+2 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <dt-bindings/clock/qcom,rpmh.h>



#include "common.h"

#include "clk-debug.h"

#include "clk-regmap.h"



#define CLK_RPMH_ARC_EN_OFFSET 0
@@ -399,6 +400,7 @@ static const struct clk_ops clk_rpmh_bcm_ops = { 
	.set_rate	= clk_rpmh_bcm_set_rate,

	.round_rate	= clk_rpmh_round_rate,

	.recalc_rate	= clk_rpmh_bcm_recalc_rate,

	.debug_init	= clk_debug_measure_add,

};



/* Use awake state instead of active-only on RSCs that do not have an AMC. */

drivers/clk/qcom/debugcc-sdxprairie.c

+3 −0
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@ static const char *const debug_mux_parent_names[] = { 
	"measure_only_ipa_2x_clk",

	"measure_only_snoc_clk",

	"apcs_mux_clk",

	"qpic_clk",

};



static struct clk_debug_mux gcc_debug_mux = {
@@ -223,6 +224,8 @@ static struct clk_debug_mux gcc_debug_mux = { 
			0x109, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

		{ "apcs_mux_clk", 0x7C, 4, CPU_CC,

			0x3, 0x7, 0x3, 0x0, 0, 1, 0, 0, U32_MAX, 1 },

		{ "qpic_clk", 0xB1, 4, GCC,

			0xB1, 0x3FF, 0, 0xF, 0, 4, 0x79000, 0x29000, 0x29004 },

	),

	.hw.init = &(struct clk_init_data){

		.name = "gcc_debug_mux",