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Commit f66a29b0 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
Browse files

tg3: Move TG3_FLG2_PROTECTED_NVRAM to tg3_flags3 



We need room for another TSO flag and it would be most efficient if it
resided in tg3_flags2.  This patch moves the TG3_FLG2_PROTECTED_NVRAM
to tg3_flags3 to make room.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Reviewed-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 24f4efd4

drivers/net/tg3.c

+6 −6
Original line number Diff line number Diff line
@@ -2249,7 +2249,7 @@ static void tg3_nvram_unlock(struct tg3 *tp) 
static void tg3_enable_nvram_access(struct tg3 *tp)

{

	if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&

	    !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {

	    !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {

		u32 nvaccess = tr32(NVRAM_ACCESS);



		tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
@@ -2260,7 +2260,7 @@ static void tg3_enable_nvram_access(struct tg3 *tp) 
static void tg3_disable_nvram_access(struct tg3 *tp)

{

	if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&

	    !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {

	    !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM)) {

		u32 nvaccess = tr32(NVRAM_ACCESS);



		tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
@@ -10970,7 +10970,7 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp) 


	/* NVRAM protection for TPM */

	if (nvcfg1 & (1 << 27))

		tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;

		tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;



	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {

	case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
@@ -11011,7 +11011,7 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) 


	/* NVRAM protection for TPM */

	if (nvcfg1 & (1 << 27)) {

		tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;

		tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;

		protect = 1;

	}
@@ -11105,7 +11105,7 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) 


	/* NVRAM protection for TPM */

	if (nvcfg1 & (1 << 27)) {

		tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;

		tp->tg3_flags3 |= TG3_FLG3_PROTECTED_NVRAM;

		protect = 1;

	}
@@ -11607,7 +11607,7 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf) 


		tg3_enable_nvram_access(tp);

		if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&

		    !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM))

		    !(tp->tg3_flags3 & TG3_FLG3_PROTECTED_NVRAM))

			tw32(NVRAM_WRITE1, 0x406);



		grc_mode = tr32(GRC_MODE);

drivers/net/tg3.h

+1 −1
Original line number Diff line number Diff line
@@ -2753,7 +2753,6 @@ struct tg3 { 
#define TG3_FLG2_SERDES_PREEMPHASIS	0x00020000

#define TG3_FLG2_5705_PLUS		0x00040000

#define TG3_FLG2_5750_PLUS		0x00080000

#define TG3_FLG2_PROTECTED_NVRAM	0x00100000

#define TG3_FLG2_USING_MSI		0x00200000

#define TG3_FLG2_USING_MSIX		0x00400000

#define TG3_FLG2_USING_MSI_OR_MSIX	(TG3_FLG2_USING_MSI | \
@@ -2773,6 +2772,7 @@ struct tg3 { 
	u32				tg3_flags3;

#define TG3_FLG3_NO_NVRAM_ADDR_TRANS	0x00000001

#define TG3_FLG3_ENABLE_APE		0x00000002

#define TG3_FLG3_PROTECTED_NVRAM	0x00000004

#define TG3_FLG3_5701_DMA_BUG		0x00000008

#define TG3_FLG3_USE_PHYLIB		0x00000010

#define TG3_FLG3_MDIOBUS_INITED		0x00000020