Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f4b81dd8 authored by Mark Brown's avatar Mark Brown
Browse files

Merge branches 'spi-drivers' and 'spi-mxs' into spi-next

parents 979570e0 c09b890b ac48f6cb

Documentation/devicetree/bindings/spi/mxs-spi.txt

0 → 100644
+22 −0
Original line number Diff line number Diff line 
* Freescale MX233/MX28 SSP/SPI



Required properties:

- compatible: Should be "fsl,<soc>-spi", where soc is "imx23" or "imx28"

- reg: Offset and length of the register set for the device

- interrupts: Should contain SSP interrupts (error irq first, dma irq second)

- fsl,ssp-dma-channel: APBX DMA channel for the SSP



Optional properties:

- clock-frequency : Input clock frequency to the SPI block in Hz.

		    Default is 160000000 Hz.



Example:



ssp0: ssp@80010000 {

	#address-cells = <1>;

	#size-cells = <0>;

	compatible = "fsl,imx28-spi";

	reg = <0x80010000 0x2000>;

	interrupts = <96 82>;

	fsl,ssp-dma-channel = <0>;

};

Documentation/devicetree/bindings/spi/spi-bus.txt

+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,9 @@ assumption that board specific platform code will be used to manage 
chip selects.  Individual drivers can define additional properties to

support describing the chip select layout.



Optional property:

- num-cs : total number of chipselects



SPI slave nodes must be children of the SPI master node and can

contain the following properties.

- reg             - (required) chip select address of device.

Documentation/devicetree/bindings/spi/spi-gpio.txt

0 → 100644
+29 −0
Original line number Diff line number Diff line 
SPI-GPIO devicetree bindings



Required properties:



 - compatible: should be set to "spi-gpio"

 - #address-cells: should be set to <0x1>

 - ranges

 - gpio-sck: GPIO spec for the SCK line to use

 - gpio-miso: GPIO spec for the MISO line to use

 - gpio-mosi: GPIO spec for the MOSI line to use

 - cs-gpios: GPIOs to use for chipselect lines

 - num-chipselects: number of chipselect lines



Example:



	spi {

		compatible = "spi-gpio";

		#address-cells = <0x1>;

		ranges;



		gpio-sck = <&gpio 95 0>;

		gpio-miso = <&gpio 98 0>;

		gpio-mosi = <&gpio 97 0>;

		cs-gpios = <&gpio 125 0>;

		num-chipselects = <1>;



		/* clients */

	};

Documentation/devicetree/bindings/spi/spi-sc18is602.txt

0 → 100644
+23 −0
Original line number Diff line number Diff line 
NXP SC18IS602/SCIS603



Required properties:

	- compatible : Should be one of

		"nxp,sc18is602"

		"nxp,sc18is602b"

		"nxp,sc18is603"

	- reg: I2C bus address



Optional properties:

	- clock-frequency : external oscillator clock frequency. If not

	  specified, the SC18IS602 default frequency (7372000) will be used.



The clock-frequency property is relevant and needed only if the chip has an

external oscillator (SC18IS603).



Example:



	sc18is603@28 {

		compatible = "nxp,sc18is603";

		reg = <0x28>;

		clock-frequency = <14744000>;

	}

Documentation/devicetree/bindings/spi/spi_pl022.txt

+22 −0
Original line number Diff line number Diff line
@@ -6,7 +6,29 @@ Required properties: 
- interrupts : Should contain SPI controller interrupt



Optional properties:

- num-cs : total number of chipselects

- cs-gpios : should specify GPIOs used for chipselects.

  The gpios will be referred to as reg = <index> in the SPI child nodes.

  If unspecified, a single SPI device without a chip select can be used.

- pl022,autosuspend-delay : delay in ms following transfer completion before

			    the runtime power management system suspends the

			    device. A setting of 0 indicates no delay and the

                            device will be suspended immediately

- pl022,rt : indicates the controller should run the message pump with realtime

             priority to minimise the transfer latency on the bus (boolean)





SPI slave nodes must be children of the SPI master node and can

contain the following properties.



- pl022,interface : interface type:

	0: SPI

	1: Texas Instruments Synchronous Serial Frame Format

	2: Microwire (Half Duplex)

- pl022,com-mode : polling, interrupt or dma

- pl022,rx-level-trig : Rx FIFO watermark level

- pl022,tx-level-trig : Tx FIFO watermark level

- pl022,ctrl-len : Microwire interface: Control length

- pl022,wait-state : Microwire interface: Wait state

- pl022,duplex : Microwire interface: Full/Half duplex