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Commit f47fbc37 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-arm64-dt-for-v4.13' of... 

Merge tag 'renesas-arm64-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Renesas ARM64 Based SoC DT Updates for v4.13

* Add support for R-Car H3 ES2.0
* Break out common board support
* Set drive-strength for ravb pins for r8a7795/h3ulcb and r8a7796/m3ulcb
* Enable HDMI outputs on r8a7795/salvator-x
* Add R-Car audio to DT of r8a7796 SoC
* Add current sense amplifiers to DT of r8a779[56]/salvator-x
* Enable NFS-root on r8a7796/salvator-x
* Enable HS200 for eMMC on r8a779[56]/salvator-x,
  r8a7795/h3ulcb and r8a7796/m3ulcb
* Enable EthernetAVB, I2C r8a7796/m3ulcb
* Update memory node to 2 GiB map on r8a7796/m3ulcb

* tag 'renesas-arm64-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (35 commits)
  arm64: dts: r8a7795: salvator-x: Add support for R-Car H3 ES2.0
  arm64: dts: r8a7795: Add support for R-Car H3 ES2.0
  arm64: dts: ulcb: Set drive-strength for ravb pins
  arm64: dts: renesas: r8a7795-salvator-x: Enable HDMI outputs
  arm64: dts: renesas: r8a7795-salvator-x: Add DU external dot clocks
  arm64: dts: renesas: salvator-x: Add HDMI output connectors
  arm64: dts: renesas: salvator-x: Add DU external dot clock sources
  arm64: dts: renesas: r8a7795: Add HDMI encoder support
  arm64: dts: salvator-x: Add panel backlight support
  arm64: dts: r8a7796: Add PWM device nodes
  arm64: dts: r8a7796: add Sound MIX support
  arm64: dts: r8a7796: add Sound CTU support
  arm64: dts: r8a7796: add Sound DVC support
  arm64: dts: r8a7796: add Sound SRC support
  arm64: dts: r8a7796: add Sound SSI DMA support
  arm64: dts: r8a7796: add Sound SSI PIO support
  arm64: dts: r8a7796: add AUDIO_DMAC support
  arm64: dts: salvator-x: Add current sense amplifiers
  arm64: dts: renesas: Extract common ULCB board support
  arm64: dts: renesas: Extract common Salvator-X board support
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5ed02dbb 0b03c32d

arch/arm64/boot/dts/renesas/Makefile

+1 −0
Original line number Diff line number Diff line 
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb

dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb

dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb



always		:= $(dtb-y)

arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts

0 → 100644
+115 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the Salvator-X board

 *

 * Copyright (C) 2015 Renesas Electronics Corp.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



#define CPG_AUDIO_CLK_I		R8A7795_CLK_S0D4



/dts-v1/;

#include "r8a7795-es1.dtsi"

#include "salvator-x.dtsi"



/ {

	model = "Renesas Salvator-X board based on r8a7795 ES1.x";

	compatible = "renesas,salvator-x", "renesas,r8a7795";



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */

		reg = <0x0 0x48000000 0x0 0x38000000>;

	};



	memory@500000000 {

		device_type = "memory";

		reg = <0x5 0x00000000 0x0 0x40000000>;

	};



	memory@600000000 {

		device_type = "memory";

		reg = <0x6 0x00000000 0x0 0x40000000>;

	};



	memory@700000000 {

		device_type = "memory";

		reg = <0x7 0x00000000 0x0 0x40000000>;

	};

};



&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&cpg CPG_MOD 721>,

		 <&cpg CPG_MOD 727>,

		 <&versaclock5 1>,

		 <&x21_clk>,

		 <&x22_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",

		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";

};



&ehci2 {

	status = "okay";

};



&hdmi0 {

	status = "okay";



	ports {

		port@1 {

			reg = <1>;

			rcar_dw_hdmi0_out: endpoint {

				remote-endpoint = <&hdmi0_con>;

			};

		};

	};

};



&hdmi0_con {

	remote-endpoint = <&rcar_dw_hdmi0_out>;

};



&hdmi1 {

	status = "okay";



	ports {

		port@1 {

			reg = <1>;

			rcar_dw_hdmi1_out: endpoint {

				remote-endpoint = <&hdmi1_con>;

			};

		};

	};

};



&hdmi1_con {

	remote-endpoint = <&rcar_dw_hdmi1_out>;

};



&ohci2 {

	status = "okay";

};



&pfc {

	usb2_pins: usb2 {

		groups = "usb2";

		function = "usb2";

	};

};



&sata {

	status = "okay";

};



&usb2_phy2 {

	pinctrl-0 = <&usb2_pins>;

	pinctrl-names = "default";



	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi

0 → 100644
+84 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the r8a7795 ES1.x SoC

 *

 * Copyright (C) 2015 Renesas Electronics Corp.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



#include "r8a7795.dtsi"



&soc {

	xhci1: usb@ee0400000 {

		compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";

		reg = <0 0xee040000 0 0xc00>;

		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 327>;

		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

		resets = <&cpg 327>;

		status = "disabled";

	};



	fcpf2: fcp@fe952000 {

		compatible = "renesas,fcpf";

		reg = <0 0xfe952000 0 0x200>;

		clocks = <&cpg CPG_MOD 613>;

		power-domains = <&sysc R8A7795_PD_A3VP>;

		resets = <&cpg 613>;

	};



	vspi2: vsp@fe9c0000 {

		compatible = "renesas,vsp2";

		reg = <0 0xfe9c0000 0 0x8000>;

		interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 629>;

		power-domains = <&sysc R8A7795_PD_A3VP>;

		resets = <&cpg 629>;



		renesas,fcp = <&fcpvi2>;

	};



	fcpvi2: fcp@fe9cf000 {

		compatible = "renesas,fcpv";

		reg = <0 0xfe9cf000 0 0x200>;

		clocks = <&cpg CPG_MOD 609>;

		power-domains = <&sysc R8A7795_PD_A3VP>;

		resets = <&cpg 609>;

	};



	vspd3: vsp@fea38000 {

		compatible = "renesas,vsp2";

		reg = <0 0xfea38000 0 0x4000>;

		interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 620>;

		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

		resets = <&cpg 620>;



		renesas,fcp = <&fcpvd3>;

	};



	fcpvd3: fcp@fea3f000 {

		compatible = "renesas,fcpv";

		reg = <0 0xfea3f000 0 0x200>;

		clocks = <&cpg CPG_MOD 600>;

		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

		resets = <&cpg 600>;

	};



	fdp1@fe948000 {

		compatible = "renesas,fdp1";

		reg = <0 0xfe948000 0 0x2400>;

		interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg CPG_MOD 117>;

		power-domains = <&sysc R8A7795_PD_A3VP>;

		resets = <&cpg 117>;

		renesas,fcp = <&fcpf2>;

	};

};



&du {

	compatible = "renesas,du-r8a7795";

	vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;

};

arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

+5 −339
Original line number Diff line number Diff line
@@ -9,24 +9,16 @@ 
 * kind, whether express or implied.

 */



#define CPG_AUDIO_CLK_I		R8A7795_CLK_S0D4



/dts-v1/;

#include "r8a7795.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include "r8a7795-es1.dtsi"

#include "ulcb.dtsi"



/ {

	model = "Renesas H3ULCB board based on r8a7795";

	model = "Renesas H3ULCB board based on r8a7795 ES1.x";

	compatible = "renesas,h3ulcb", "renesas,r8a7795";



	aliases {

		serial0 = &scif2;

		ethernet0 = &avb;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */
@@ -47,330 +39,4 @@ 
		device_type = "memory";

		reg = <0x7 0x00000000 0x0 0x40000000>;

	};



	leds {

		compatible = "gpio-leds";



		led5 {

			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;

		};

		led6 {

			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;

		};

	};



	keyboard {

		compatible = "gpio-keys";



		key-1 {

			linux,code = <KEY_1>;

			label = "SW3";

			wakeup-source;

			debounce-interval = <20>;

			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;

		};

	};



	x12_clk: x12 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <24576000>;

	};



	reg_1p8v: regulator0 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-1.8V";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-boot-on;

		regulator-always-on;

	};



	reg_3p3v: regulator1 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-boot-on;

		regulator-always-on;

	};



	vcc_sdhi0: regulator-vcc-sdhi0 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI0 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	vccq_sdhi0: regulator-vccq-sdhi0 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI0 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	};



	audio_clkout: audio-clkout {

		/*

		 * This is same as <&rcar_sound 0>

		 * but needed to avoid cs2000/rcar_sound probe dead-lock

		 */

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <11289600>;

	};



	rsnd_ak4613: sound {

		compatible = "simple-audio-card";



		simple-audio-card,format = "left_j";

		simple-audio-card,bitclock-master = <&sndcpu>;

		simple-audio-card,frame-master = <&sndcpu>;



		sndcpu: simple-audio-card,cpu {

			sound-dai = <&rcar_sound>;

		};



		sndcodec: simple-audio-card,codec {

			sound-dai = <&ak4613>;

		};

	};

};



&extal_clk {

	clock-frequency = <16666666>;

};



&extalr_clk {

	clock-frequency = <32768>;

};



&pfc {

	pinctrl-0 = <&scif_clk_pins>;

	pinctrl-names = "default";



	scif2_pins: scif2 {

		groups = "scif2_data_a";

		function = "scif2";

	};



	scif_clk_pins: scif_clk {

		groups = "scif_clk_a";

		function = "scif_clk";

	};



	i2c2_pins: i2c2 {

		groups = "i2c2_a";

		function = "i2c2";

	};



	avb_pins: avb {

		groups = "avb_mdc";

		function = "avb";

	};



	sdhi0_pins: sd0 {

		groups = "sdhi0_data4", "sdhi0_ctrl";

		function = "sdhi0";

		power-source = <3300>;

	};



	sdhi0_pins_uhs: sd0_uhs {

		groups = "sdhi0_data4", "sdhi0_ctrl";

		function = "sdhi0";

		power-source = <1800>;

	};



	sdhi2_pins: sd2 {

		groups = "sdhi2_data8", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <3300>;

	};



	sdhi2_pins_uhs: sd2_uhs {

		groups = "sdhi2_data8", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <1800>;

	};



	sound_pins: sound {

		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";

		function = "ssi";

	};



	sound_clk_pins: sound-clk {

		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",

			 "audio_clkout_a", "audio_clkout3_a";

		function = "audio_clk";

	};



	usb1_pins: usb1 {

		groups = "usb1";

		function = "usb1";

	};

};



&scif2 {

	pinctrl-0 = <&scif2_pins>;

	pinctrl-names = "default";



	status = "okay";

};



&scif_clk {

	clock-frequency = <14745600>;

};



&i2c2 {

	pinctrl-0 = <&i2c2_pins>;

	pinctrl-names = "default";



	status = "okay";



	clock-frequency = <100000>;



	ak4613: codec@10 {

		compatible = "asahi-kasei,ak4613";

		#sound-dai-cells = <0>;

		reg = <0x10>;

		clocks = <&rcar_sound 3>;



		asahi-kasei,in1-single-end;

		asahi-kasei,in2-single-end;

		asahi-kasei,out1-single-end;

		asahi-kasei,out2-single-end;

		asahi-kasei,out3-single-end;

		asahi-kasei,out4-single-end;

		asahi-kasei,out5-single-end;

		asahi-kasei,out6-single-end;

	};



	cs2000: clk-multiplier@4f {

		#clock-cells = <0>;

		compatible = "cirrus,cs2000-cp";

		reg = <0x4f>;

		clocks = <&audio_clkout>, <&x12_clk>;

		clock-names = "clk_in", "ref_clk";



		assigned-clocks = <&cs2000>;

		assigned-clock-rates = <24576000>; /* 1/1 divide */

	};

};



&rcar_sound {

	pinctrl-0 = <&sound_pins &sound_clk_pins>;

	pinctrl-names = "default";



	/* Single DAI */

	#sound-dai-cells = <0>;



	/* audio_clkout0/1/2/3 */

	#clock-cells = <1>;

	clock-frequency = <11289600>;



	status = "okay";



	/* update <audio_clk_b> to <cs2000> */

	clocks = <&cpg CPG_MOD 1005>,

		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,

		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,

		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,

		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,

		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,

		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,

		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,

		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,

		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,

		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,

		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,

		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,

		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,

		 <&audio_clk_a>, <&cs2000>,

		 <&audio_clk_c>,

		 <&cpg CPG_CORE R8A7795_CLK_S0D4>;



	rcar_sound,dai {

		dai0 {

			playback = <&ssi0 &src0 &dvc0>;

			capture  = <&ssi1 &src1 &dvc1>;

		};

	};

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-1 = <&sdhi0_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&vcc_sdhi0>;

	vqmmc-supply = <&vccq_sdhi0>;

	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;

	bus-width = <4>;

	sd-uhs-sdr50;

	status = "okay";

};



&sdhi2 {

	/* used for on-board 8bit eMMC */

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-1 = <&sdhi2_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&reg_3p3v>;

	vqmmc-supply = <&reg_1p8v>;

	bus-width = <8>;

	non-removable;

	status = "okay";

};



&ssi1 {

	shared-pin;

};



&wdt0 {

	timeout-sec = <60>;

	status = "okay";

};



&audio_clk_a {

	clock-frequency = <22579200>;

};



&avb {

	pinctrl-0 = <&avb_pins>;

	pinctrl-names = "default";

	renesas,no-ether-link;

	phy-handle = <&phy0>;

	status = "okay";



	phy0: ethernet-phy@0 {

		rxc-skew-ps = <1500>;

		reg = <0>;

		interrupt-parent = <&gpio2>;

		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;

	};

};



&usb2_phy1 {

	pinctrl-0 = <&usb1_pins>;

	pinctrl-names = "default";



	status = "okay";

};



&ehci1 {

	status = "okay";

};



&ohci1 {

	status = "okay";

};

arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts

+48 −517
Original line number Diff line number Diff line
@@ -8,577 +8,108 @@ 
 * kind, whether express or implied.

 */



/*

 * SSI-AK4613

 *

 * This command is required when Playback/Capture

 *

 *	amixer set "DVC Out" 100%

 *	amixer set "DVC In" 100%

 *

 * You can use Mute

 *

 *	amixer set "DVC Out Mute" on

 *	amixer set "DVC In Mute" on

 *

 * You can use Volume Ramp

 *

 *	amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"

 *	amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"

 *	amixer set "DVC Out Ramp" on

 *	aplay xxx.wav &

 *	amixer set "DVC Out"  80%  // Volume Down

 *	amixer set "DVC Out" 100%  // Volume Up

 */

#define CPG_AUDIO_CLK_I		R8A7795_CLK_S0D4



/dts-v1/;

#include "r8a7795.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include "salvator-x.dtsi"



/ {

	model = "Renesas Salvator-X board based on r8a7795";

	model = "Renesas Salvator-X board based on r8a7795 ES2.0+";

	compatible = "renesas,salvator-x", "renesas,r8a7795";



	aliases {

		serial0 = &scif2;

		serial1 = &scif1;

		ethernet0 = &avb;

	};



	chosen {

		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";

		stdout-path = "serial0:115200n8";

	};



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */

		reg = <0x0 0x48000000 0x0 0x38000000>;

	};



	x12_clk: x12 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <24576000>;

	};



	reg_1p8v: regulator0 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-1.8V";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-boot-on;

		regulator-always-on;

	};



	reg_3p3v: regulator1 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-boot-on;

		regulator-always-on;

	};



	vcc_sdhi0: regulator-vcc-sdhi0 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI0 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	vccq_sdhi0: regulator-vccq-sdhi0 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI0 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	};



	vcc_sdhi3: regulator-vcc-sdhi3 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI3 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	memory@500000000 {

		device_type = "memory";

		reg = <0x5 0x00000000 0x0 0x40000000>;

	};



	vccq_sdhi3: regulator-vccq-sdhi3 {

		compatible = "regulator-gpio";



		regulator-name = "SDHI3 VccQ";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;



		gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;

		gpios-states = <1>;

		states = <3300000 1

			  1800000 0>;

	memory@600000000 {

		device_type = "memory";

		reg = <0x6 0x00000000 0x0 0x40000000>;

	};



	vbus0_usb2: regulator-vbus0-usb2 {

		compatible = "regulator-fixed";



		regulator-name = "USB20_VBUS0";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;



		gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	memory@700000000 {

		device_type = "memory";

		reg = <0x7 0x00000000 0x0 0x40000000>;

	};



	audio_clkout: audio_clkout {

		/*

		 * This is same as <&rcar_sound 0>

		 * but needed to avoid cs2000/rcar_sound probe dead-lock

		 */

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <11289600>;

};



	rsnd_ak4613: sound {

		compatible = "simple-audio-card";



		simple-audio-card,format = "left_j";

		simple-audio-card,bitclock-master = <&sndcpu>;

		simple-audio-card,frame-master = <&sndcpu>;



		sndcpu: simple-audio-card,cpu {

			sound-dai = <&rcar_sound>;

&du {

	clocks = <&cpg CPG_MOD 724>,

		 <&cpg CPG_MOD 723>,

		 <&cpg CPG_MOD 722>,

		 <&cpg CPG_MOD 721>,

		 <&cpg CPG_MOD 727>,

		 <&versaclock5 1>,

		 <&x21_clk>,

		 <&x22_clk>,

		 <&versaclock5 2>;

	clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",

		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";

};



		sndcodec: simple-audio-card,codec {

			sound-dai = <&ak4613>;

		};

&ehci2 {

	status = "okay";

};



	vga-encoder {

		compatible = "adi,adv7123";

&hdmi0 {

	status = "okay";



	ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				adv7123_in: endpoint {

					remote-endpoint = <&du_out_rgb>;

				};

			};

		port@1 {

			reg = <1>;

				adv7123_out: endpoint {

					remote-endpoint = <&vga_in>;

			rcar_dw_hdmi0_out: endpoint {

				remote-endpoint = <&hdmi0_con>;

			};

		};

	};

};



	vga {

		compatible = "vga-connector";



		port {

			vga_in: endpoint {

				remote-endpoint = <&adv7123_out>;

			};

		};

	};

&hdmi0_con {

	remote-endpoint = <&rcar_dw_hdmi0_out>;

};



&du {

	pinctrl-0 = <&du_pins>;

	pinctrl-names = "default";

&hdmi1 {

	status = "okay";



	ports {

		port@0 {

			endpoint {

				remote-endpoint = <&adv7123_in>;

			};

		};

		port@3 {

			lvds_connector: endpoint {

		port@1 {

			reg = <1>;

			rcar_dw_hdmi1_out: endpoint {

				remote-endpoint = <&hdmi1_con>;

			};

		};

	};

};



&extal_clk {

	clock-frequency = <16666666>;

&hdmi1_con {

	remote-endpoint = <&rcar_dw_hdmi1_out>;

};



&extalr_clk {

	clock-frequency = <32768>;

&ohci2 {

	status = "okay";

};



&pfc {

	pinctrl-0 = <&scif_clk_pins>;

	pinctrl-names = "default";



	scif1_pins: scif1 {

		groups = "scif1_data_a", "scif1_ctrl";

		function = "scif1";

	};

	scif2_pins: scif2 {

		groups = "scif2_data_a";

		function = "scif2";

	};

	scif_clk_pins: scif_clk {

		groups = "scif_clk_a";

		function = "scif_clk";

	};



	i2c2_pins: i2c2 {

		groups = "i2c2_a";

		function = "i2c2";

	};



	avb_pins: avb {

		mux {

			groups = "avb_link", "avb_phy_int", "avb_mdc",

				 "avb_mii";

			function = "avb";

		};



		pins_mdc {

			groups = "avb_mdc";

			drive-strength = <24>;

		};



		pins_mii_tx {

			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",

			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";

			drive-strength = <12>;

		};

	};



	du_pins: du {

		groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";

		function = "du";

	};



	sdhi0_pins: sd0 {

		groups = "sdhi0_data4", "sdhi0_ctrl";

		function = "sdhi0";

		power-source = <3300>;

	};



	sdhi0_pins_uhs: sd0_uhs {

		groups = "sdhi0_data4", "sdhi0_ctrl";

		function = "sdhi0";

		power-source = <1800>;

	};



	sdhi2_pins: sd2 {

		groups = "sdhi2_data8", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <3300>;

	};



	sdhi2_pins_uhs: sd2_uhs {

		groups = "sdhi2_data8", "sdhi2_ctrl";

		function = "sdhi2";

		power-source = <1800>;

	};



	sdhi3_pins: sd3 {

		groups = "sdhi3_data4", "sdhi3_ctrl";

		function = "sdhi3";

		power-source = <3300>;

	};



	sdhi3_pins_uhs: sd3_uhs {

		groups = "sdhi3_data4", "sdhi3_ctrl";

		function = "sdhi3";

		power-source = <1800>;

	};



	sound_pins: sound {

		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";

		function = "ssi";

	};



	sound_clk_pins: sound_clk {

		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",

			 "audio_clkout_a", "audio_clkout3_a";

		function = "audio_clk";

	};



	usb0_pins: usb0 {

		groups = "usb0";

		function = "usb0";

	};



	usb1_pins: usb1 {

		mux {

			groups = "usb1";

			function = "usb1";

		};



		ovc {

			pins = "GP_6_27";

			bias-pull-up;

		};



		pwen {

			pins = "GP_6_26";

			bias-pull-down;

		};

	};



	usb2_pins: usb2 {

		groups = "usb2";

		function = "usb2";

	};

};



&scif1 {

	pinctrl-0 = <&scif1_pins>;

	pinctrl-names = "default";



	uart-has-rtscts;

	status = "okay";

};



&scif2 {

	pinctrl-0 = <&scif2_pins>;

	pinctrl-names = "default";



	status = "okay";

};



&scif_clk {

	clock-frequency = <14745600>;

};



&i2c2 {

	pinctrl-0 = <&i2c2_pins>;

	pinctrl-names = "default";



	status = "okay";



	clock-frequency = <100000>;



	ak4613: codec@10 {

		compatible = "asahi-kasei,ak4613";

		#sound-dai-cells = <0>;

		reg = <0x10>;

		clocks = <&rcar_sound 3>;



		asahi-kasei,in1-single-end;

		asahi-kasei,in2-single-end;

		asahi-kasei,out1-single-end;

		asahi-kasei,out2-single-end;

		asahi-kasei,out3-single-end;

		asahi-kasei,out4-single-end;

		asahi-kasei,out5-single-end;

		asahi-kasei,out6-single-end;

	};



	cs2000: clk_multiplier@4f {

		#clock-cells = <0>;

		compatible = "cirrus,cs2000-cp";

		reg = <0x4f>;

		clocks = <&audio_clkout>, <&x12_clk>;

		clock-names = "clk_in", "ref_clk";



		assigned-clocks = <&cs2000>;

		assigned-clock-rates = <24576000>; /* 1/1 divide */

	};

};



&rcar_sound {

	pinctrl-0 = <&sound_pins &sound_clk_pins>;

	pinctrl-names = "default";



	/* Single DAI */

	#sound-dai-cells = <0>;



	/* audio_clkout0/1/2/3 */

	#clock-cells = <1>;

	clock-frequency = <11289600>;



	status = "okay";



	/* update <audio_clk_b> to <cs2000> */

	clocks = <&cpg CPG_MOD 1005>,

		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,

		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,

		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,

		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,

		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,

		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,

		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,

		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,

		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,

		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,

		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,

		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,

		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,

		 <&audio_clk_a>, <&cs2000>,

		 <&audio_clk_c>,

		 <&cpg CPG_CORE R8A7795_CLK_S0D4>;



	rcar_sound,dai {

		dai0 {

			playback = <&ssi0 &src0 &dvc0>;

			capture  = <&ssi1 &src1 &dvc1>;

		};

	};

};



&sata {

	status = "okay";

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-1 = <&sdhi0_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&vcc_sdhi0>;

	vqmmc-supply = <&vccq_sdhi0>;

	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;

	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;

	bus-width = <4>;

	sd-uhs-sdr50;

	status = "okay";

};



&sdhi2 {

	/* used for on-board 8bit eMMC */

	pinctrl-0 = <&sdhi2_pins>;

	pinctrl-1 = <&sdhi2_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&reg_3p3v>;

	vqmmc-supply = <&reg_1p8v>;

	bus-width = <8>;

	non-removable;

	status = "okay";

};



&sdhi3 {

	pinctrl-0 = <&sdhi3_pins>;

	pinctrl-1 = <&sdhi3_pins_uhs>;

	pinctrl-names = "default", "state_uhs";



	vmmc-supply = <&vcc_sdhi3>;

	vqmmc-supply = <&vccq_sdhi3>;

	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;

	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;

	bus-width = <4>;

	sd-uhs-sdr50;

	status = "okay";

};



&ssi1 {

	shared-pin;

};



&wdt0 {

	timeout-sec = <60>;

	status = "okay";

};



&audio_clk_a {

	clock-frequency = <22579200>;

};



&i2c_dvfs {

	status = "okay";

};



&avb {

	pinctrl-0 = <&avb_pins>;

	pinctrl-names = "default";

	renesas,no-ether-link;

	phy-handle = <&phy0>;

	status = "okay";



	phy0: ethernet-phy@0 {

		rxc-skew-ps = <1500>;

		reg = <0>;

		interrupt-parent = <&gpio2>;

		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;

	};

};



&xhci0 {

	status = "okay";

};



&usb2_phy0 {

	pinctrl-0 = <&usb0_pins>;

	pinctrl-names = "default";



	vbus-supply = <&vbus0_usb2>;

	status = "okay";

};



&usb2_phy1 {

	pinctrl-0 = <&usb1_pins>;

	pinctrl-names = "default";



	status = "okay";

};



&usb2_phy2 {

	pinctrl-0 = <&usb2_pins>;

	pinctrl-names = "default";



	status = "okay";

};
 


&ehci0 {

	status = "okay";

};



&ehci1 {

	status = "okay";

};



&ehci2 {

	status = "okay";

};



&ohci0 {

	status = "okay";

};



&ohci1 {

	status = "okay";

};



&ohci2 {

	status = "okay";

};



&hsusb {

	status = "okay";

};



&pcie_bus_clk {

	clock-frequency = <100000000>;

};



&pciec0 {

	status = "okay";

};



&pciec1 {

	status = "okay";

};