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Commit f47ea120 authored by Sriharsha Allenki's avatar Sriharsha Allenki
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ARM: dts: msm: Vote at SVS for master clock for USB on Trinket 



The SVS range of master clock of USB core for Trinket is
enough for USB Superspeed functionality. So, vote
the master clock at SVS for Trinket.
Also, also vote for the SYS_NOC bus at SVS at normal
opertaion.

Change-Id: I9cd551870ff3f1723b203b839bd785c417670abc
Signed-off-by: default avatarSriharsha Allenki <sallenki@codeaurora.org>
parent 2d0bbcbf

arch/arm64/boot/dts/qcom/trinket-usb.dtsi

+3 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -42,7 +42,7 @@ 
		resets = <&clock_gcc GCC_USB30_PRIM_BCR>;

		reset-names = "core_reset";



		qcom,core-clk-rate = <200000000>;

		qcom,core-clk-rate = <133333333>;

		qcom,core-clk-rate-hs = <66666667>;

		qcom,num-gsi-evt-buffs = <0x3>;

		qcom,gsi-reg-offset =
@@ -65,7 +65,7 @@ 


			/*  nominal vote */

			<MSM_BUS_MASTER_USB3

				MSM_BUS_SLAVE_EBI_CH0 1000000 2500000>,

				MSM_BUS_SLAVE_EBI_CH0 240000 700000>,

			<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>,

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>,