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Commit f4075a8f authored by Nicolin Chen's avatar Nicolin Chen Committed by Mark Brown
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ASoC: fsl_sai: Reduce race condition during TE/RE enabling 



For trigger start, we don't need to check if it's the first time to
enable TE/RE or second time. It doesn't hurt to enable them any way,
which in the meantime can reduce race condition for TE/RE enabling.

For trigger stop, we will definitely clear FRDE of current direction.
Thus the driver only needs to read the opposite one's.

Signed-off-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 4800f88b

sound/soc/fsl/fsl_sai.c

+7 −11
Original line number Diff line number Diff line
@@ -327,7 +327,7 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, 
{

	struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);

	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;

	u32 tcsr, rcsr;

	u32 xcsr;



	/*

	 * The transmitter bit clock and frame sync are to be
@@ -338,9 +338,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, 
	regmap_update_bits(sai->regmap, FSL_SAI_RCR2, FSL_SAI_CR2_SYNC,

			   FSL_SAI_CR2_SYNC);



	regmap_read(sai->regmap, FSL_SAI_TCSR, &tcsr);

	regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr);



	/*

	 * It is recommended that the transmitter is the last enabled

	 * and the first disabled.
@@ -349,12 +346,10 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, 
	case SNDRV_PCM_TRIGGER_START:

	case SNDRV_PCM_TRIGGER_RESUME:

	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:

		if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {

		regmap_update_bits(sai->regmap, FSL_SAI_RCSR,

				   FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);

		regmap_update_bits(sai->regmap, FSL_SAI_TCSR,

				   FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);

		}



		regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),

				   FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
@@ -370,7 +365,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, 
				   FSL_SAI_CSR_xIE_MASK, 0);



		/* Check if the opposite FRDE is also disabled */

		if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) {

		regmap_read(sai->regmap, FSL_SAI_xCSR(!tx), &xcsr);

		if (!(xcsr & FSL_SAI_CSR_FRDE)) {

			/* Disable both directions and reset their FIFOs */

			regmap_update_bits(sai->regmap, FSL_SAI_TCSR,

					   FSL_SAI_CSR_TERE | FSL_SAI_CSR_FR,