ARM: dts: msm: disable L0s for PCIe0 and PCIe1 on sm8150



PCIe0 and PCIe1 does not support L0s on sm8150.

Change-Id: I526ad0fe18ee3f1543913dd00347487a9140298c
Signed-off-by: Tony Truong <truong@codeaurora.org>

parent da94ab0a

arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi

+4 −0

Original line number	Diff line number	Diff line
		@@ -208,6 +208,8 @@
		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX
		RPMH_REGULATOR_LEVEL_NOM 0>;

		qcom,no-l0s-supported;

		qcom,max-link-speed = <0x3>;

		qcom,ep-latency = <10>;
		@@ -526,6 +528,8 @@
		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX
		RPMH_REGULATOR_LEVEL_NOM 0>;

		qcom,no-l0s-supported;

		qcom,max-link-speed = <0x3>;

		qcom,ep-latency = <10>;