Loading arch/arm64/boot/dts/qcom/atoll.dtsi +419 −0 Original line number Diff line number Diff line Loading @@ -904,6 +904,425 @@ #clock-cells = <1>; #reset-cells = <1>; }; tcsr_mutex_block: syscon@01F40000 { compatible = "syscon"; reg = <0x01F40000 0x20000>; }; tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_region>; hwlocks = <&tcsr_mutex 3>; }; apcs_glb: mailbox@17C00000 { compatible = "qcom,atoll-apcs-hmss-global"; reg = <0x17C00000 0x10000>; #mbox-cells = <1>; }; apcs_glb2: mailbox@17C00010 { compatible = "qcom,atoll-apcs-hmss-ipc2"; reg = <0x17C00010 0x4>; #mbox-cells = <1>; }; qcom,glink { compatible = "qcom,glink"; #address-cells = <1>; #size-cells = <1>; ranges; glink_modem: modem { qcom,remote-pid = <1>; transport = "smem"; mboxes = <&apcs_glb 12>; mbox-names = "mpss_smem"; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; label = "modem"; qcom,glink-label = "mpss"; qcom,modem_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,modem_ds { qcom,glink-channels = "DS"; qcom,intents = <0x4000 2>; }; qcom,modem_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_adsp>, <&glink_cdsp>; }; }; glink_adsp: adsp { qcom,remote-pid = <2>; transport = "smem"; mboxes = <&apcs_glb 8>; mbox-names = "adsp_smem"; interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; label = "adsp"; qcom,glink-label = "lpass"; qcom,adsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,apr_tal_rpmsg { qcom,glink-channels = "apr_audio_svc"; qcom,intents = <0x200 20>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,adsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_modem>, <&glink_cdsp>; }; }; glink_cdsp: cdsp { qcom,remote-pid = <5>; transport = "smem"; mboxes = <&apcs_glb 4>; mbox-names = "cdsp_smem"; interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; label = "cdsp"; qcom,glink-label = "cdsp"; qcom,cdsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,msm_cdsprm_rpmsg { compatible = "qcom,msm-cdsprm-rpmsg"; qcom,glink-channels = "cdsprmglink-apps-dsp"; qcom,intents = <0x20 12>; msm_cdsp_rm: qcom,msm_cdsp_rm { compatible = "qcom,msm-cdsp-rm"; qcom,qos-latency-us = <44>; qcom,qos-maxhold-ms = <20>; #cooling-cells = <2>; }; msm_hvx_rm: qcom,msm_hvx_rm { compatible = "qcom,msm-hvx-rm"; #cooling-cells = <2>; }; }; qcom,cdsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_modem>, <&glink_npu>, <&glink_adsp>; }; }; glink_npu: npu { transport = "smem"; qcom,remote-pid = <10>; mboxes = <&apcs_glb2 4>; mbox-names = "npu_smem"; interrupts = <GIC_SPI 587 IRQ_TYPE_EDGE_RISING>; label = "npu"; qcom,glink-label = "npu"; qcom,npu_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,npu_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_cdsp>; }; }; glink_spi_xprt_wdsp: wdsp { transport = "spi"; tx-descriptors = <0x12000 0x12004>; rx-descriptors = <0x1200c 0x12010>; label = "wdsp"; qcom,glink-label = "wdsp"; qcom,wdsp_ctrl { qcom,glink-channels = "g_glink_ctrl"; qcom,intents = <0x400 1>; }; qcom,wdsp_ild { qcom,glink-channels = "g_glink_persistent_data_ild"; }; qcom,wdsp_nild { qcom,glink-channels = "g_glink_persistent_data_nild"; }; qcom,wdsp_data { qcom,glink-channels = "g_glink_audio_data"; qcom,intents = <0x1000 2>; }; qcom,diag_data { qcom,glink-channels = "DIAG_DATA"; qcom,intents = <0x4000 2>; }; qcom,diag_ctrl { qcom,glink-channels = "DIAG_CTRL"; qcom,intents = <0x4000 1>; }; qcom,diag_cmd { qcom,glink-channels = "DIAG_CMD"; qcom,intents = <0x4000 1 >; }; }; }; qcom,glinkpkt { compatible = "qcom,glinkpkt"; qcom,glinkpkt-at-mdm0 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DS"; qcom,glinkpkt-dev-name = "at_mdm0"; }; qcom,glinkpkt-apr-apps2 { qcom,glinkpkt-edge = "adsp"; qcom,glinkpkt-ch-name = "apr_apps2"; qcom,glinkpkt-dev-name = "apr_apps2"; }; qcom,glinkpkt-data40-cntl { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA40_CNTL"; qcom,glinkpkt-dev-name = "smdcntl8"; }; qcom,glinkpkt-data1 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA1"; qcom,glinkpkt-dev-name = "smd7"; }; qcom,glinkpkt-data4 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA4"; qcom,glinkpkt-dev-name = "smd8"; }; qcom,glinkpkt-data11 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA11"; qcom,glinkpkt-dev-name = "smd11"; }; }; qcom,smp2p_sleepstate { compatible = "qcom,smp2p-sleepstate"; qcom,smem-states = <&sleepstate_smp2p_out 0>; interrupt-parent = <&sleepstate_smp2p_in>; interrupts = <0 0>; interrupt-names = "smp2p-sleepstate-in"; }; qcom,smp2p-modem { compatible = "qcom,smp2p"; qcom,smem = <435>, <428>; interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 14>; qcom,local-pid = <0>; qcom,remote-pid = <1>; modem_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; modem_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_ipa_1_out: qcom,smp2p-ipa-1-out { qcom,entry-name = "ipa"; #qcom,smem-state-cells = <1>; }; /* ipa - inbound entry from mss */ smp2p_ipa_1_in: qcom,smp2p-ipa-1-in { qcom,entry-name = "ipa"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { qcom,entry-name = "wlan"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 10>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; sleepstate_smp2p_out: sleepstate-out { qcom,entry-name = "sleepstate"; #qcom,smem-state-cells = <1>; }; sleepstate_smp2p_in: qcom,sleepstate-in { qcom,entry-name = "sleepstate_see"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 6>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-npu { compatible = "qcom,smp2p"; qcom,smem = <617>, <616>; interrupts = <GIC_SPI 589 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb2 6>; qcom,local-pid = <0>; qcom,remote-pid = <10>; npu_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; npu_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qmp_aop: qcom,qmp-aop@c300000 { compatible = "qcom,qmp-mbox"; reg = <0xc300000 0x1000>, <0x17c0000C 0x4>; reg-names = "msgram", "irq-reg-base"; qcom,irq-mask = <0x1>; interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; label = "aop"; qcom,early-boot; priority = <0>; mbox-desc-offset = <0x0>; #mbox-cells = <1>; }; }; #include "atoll-gdsc.dtsi" Loading Loading
arch/arm64/boot/dts/qcom/atoll.dtsi +419 −0 Original line number Diff line number Diff line Loading @@ -904,6 +904,425 @@ #clock-cells = <1>; #reset-cells = <1>; }; tcsr_mutex_block: syscon@01F40000 { compatible = "syscon"; reg = <0x01F40000 0x20000>; }; tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x1000>; #hwlock-cells = <1>; }; smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_region>; hwlocks = <&tcsr_mutex 3>; }; apcs_glb: mailbox@17C00000 { compatible = "qcom,atoll-apcs-hmss-global"; reg = <0x17C00000 0x10000>; #mbox-cells = <1>; }; apcs_glb2: mailbox@17C00010 { compatible = "qcom,atoll-apcs-hmss-ipc2"; reg = <0x17C00010 0x4>; #mbox-cells = <1>; }; qcom,glink { compatible = "qcom,glink"; #address-cells = <1>; #size-cells = <1>; ranges; glink_modem: modem { qcom,remote-pid = <1>; transport = "smem"; mboxes = <&apcs_glb 12>; mbox-names = "mpss_smem"; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; label = "modem"; qcom,glink-label = "mpss"; qcom,modem_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,modem_ds { qcom,glink-channels = "DS"; qcom,intents = <0x4000 2>; }; qcom,modem_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_adsp>, <&glink_cdsp>; }; }; glink_adsp: adsp { qcom,remote-pid = <2>; transport = "smem"; mboxes = <&apcs_glb 8>; mbox-names = "adsp_smem"; interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; label = "adsp"; qcom,glink-label = "lpass"; qcom,adsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,apr_tal_rpmsg { qcom,glink-channels = "apr_audio_svc"; qcom,intents = <0x200 20>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,adsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_modem>, <&glink_cdsp>; }; }; glink_cdsp: cdsp { qcom,remote-pid = <5>; transport = "smem"; mboxes = <&apcs_glb 4>; mbox-names = "cdsp_smem"; interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; label = "cdsp"; qcom,glink-label = "cdsp"; qcom,cdsp_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,msm_fastrpc_rpmsg { compatible = "qcom,msm-fastrpc-rpmsg"; qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,intents = <0x64 64>; }; qcom,msm_cdsprm_rpmsg { compatible = "qcom,msm-cdsprm-rpmsg"; qcom,glink-channels = "cdsprmglink-apps-dsp"; qcom,intents = <0x20 12>; msm_cdsp_rm: qcom,msm_cdsp_rm { compatible = "qcom,msm-cdsp-rm"; qcom,qos-latency-us = <44>; qcom,qos-maxhold-ms = <20>; #cooling-cells = <2>; }; msm_hvx_rm: qcom,msm_hvx_rm { compatible = "qcom,msm-hvx-rm"; #cooling-cells = <2>; }; }; qcom,cdsp_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_modem>, <&glink_npu>, <&glink_adsp>; }; }; glink_npu: npu { transport = "smem"; qcom,remote-pid = <10>; mboxes = <&apcs_glb2 4>; mbox-names = "npu_smem"; interrupts = <GIC_SPI 587 IRQ_TYPE_EDGE_RISING>; label = "npu"; qcom,glink-label = "npu"; qcom,npu_qrtr { qcom,glink-channels = "IPCRTR"; qcom,intents = <0x800 5 0x2000 3 0x4400 2>; }; qcom,npu_glink_ssr { qcom,glink-channels = "glink_ssr"; qcom,notify-edges = <&glink_cdsp>; }; }; glink_spi_xprt_wdsp: wdsp { transport = "spi"; tx-descriptors = <0x12000 0x12004>; rx-descriptors = <0x1200c 0x12010>; label = "wdsp"; qcom,glink-label = "wdsp"; qcom,wdsp_ctrl { qcom,glink-channels = "g_glink_ctrl"; qcom,intents = <0x400 1>; }; qcom,wdsp_ild { qcom,glink-channels = "g_glink_persistent_data_ild"; }; qcom,wdsp_nild { qcom,glink-channels = "g_glink_persistent_data_nild"; }; qcom,wdsp_data { qcom,glink-channels = "g_glink_audio_data"; qcom,intents = <0x1000 2>; }; qcom,diag_data { qcom,glink-channels = "DIAG_DATA"; qcom,intents = <0x4000 2>; }; qcom,diag_ctrl { qcom,glink-channels = "DIAG_CTRL"; qcom,intents = <0x4000 1>; }; qcom,diag_cmd { qcom,glink-channels = "DIAG_CMD"; qcom,intents = <0x4000 1 >; }; }; }; qcom,glinkpkt { compatible = "qcom,glinkpkt"; qcom,glinkpkt-at-mdm0 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DS"; qcom,glinkpkt-dev-name = "at_mdm0"; }; qcom,glinkpkt-apr-apps2 { qcom,glinkpkt-edge = "adsp"; qcom,glinkpkt-ch-name = "apr_apps2"; qcom,glinkpkt-dev-name = "apr_apps2"; }; qcom,glinkpkt-data40-cntl { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA40_CNTL"; qcom,glinkpkt-dev-name = "smdcntl8"; }; qcom,glinkpkt-data1 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA1"; qcom,glinkpkt-dev-name = "smd7"; }; qcom,glinkpkt-data4 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA4"; qcom,glinkpkt-dev-name = "smd8"; }; qcom,glinkpkt-data11 { qcom,glinkpkt-edge = "mpss"; qcom,glinkpkt-ch-name = "DATA11"; qcom,glinkpkt-dev-name = "smd11"; }; }; qcom,smp2p_sleepstate { compatible = "qcom,smp2p-sleepstate"; qcom,smem-states = <&sleepstate_smp2p_out 0>; interrupt-parent = <&sleepstate_smp2p_in>; interrupts = <0 0>; interrupt-names = "smp2p-sleepstate-in"; }; qcom,smp2p-modem { compatible = "qcom,smp2p"; qcom,smem = <435>, <428>; interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 14>; qcom,local-pid = <0>; qcom,remote-pid = <1>; modem_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; modem_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_ipa_1_out: qcom,smp2p-ipa-1-out { qcom,entry-name = "ipa"; #qcom,smem-state-cells = <1>; }; /* ipa - inbound entry from mss */ smp2p_ipa_1_in: qcom,smp2p-ipa-1-in { qcom,entry-name = "ipa"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { qcom,entry-name = "wlan"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-adsp { compatible = "qcom,smp2p"; qcom,smem = <443>, <429>; interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 10>; qcom,local-pid = <0>; qcom,remote-pid = <2>; adsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; adsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; sleepstate_smp2p_out: sleepstate-out { qcom,entry-name = "sleepstate"; #qcom,smem-state-cells = <1>; }; sleepstate_smp2p_in: qcom,sleepstate-in { qcom,entry-name = "sleepstate_see"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp { compatible = "qcom,smp2p"; qcom,smem = <94>, <432>; interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb 6>; qcom,local-pid = <0>; qcom,remote-pid = <5>; cdsp_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; cdsp_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-npu { compatible = "qcom,smp2p"; qcom,smem = <617>, <616>; interrupts = <GIC_SPI 589 IRQ_TYPE_EDGE_RISING>; mboxes = <&apcs_glb2 6>; qcom,local-pid = <0>; qcom,remote-pid = <10>; npu_smp2p_out: master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <1>; }; npu_smp2p_in: slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <2>; }; }; qmp_aop: qcom,qmp-aop@c300000 { compatible = "qcom,qmp-mbox"; reg = <0xc300000 0x1000>, <0x17c0000C 0x4>; reg-names = "msgram", "irq-reg-base"; qcom,irq-mask = <0x1>; interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; label = "aop"; qcom,early-boot; priority = <0>; mbox-desc-offset = <0x0>; #mbox-cells = <1>; }; }; #include "atoll-gdsc.dtsi" Loading