Commit f0f39677 authored Mar 07, 2018 by Raghavendra Rao Ananta

ARM: dts: msm: add DSU PMU support for sdm855



Add DT node to support the ARM DynamIQ Shared Unit (DSU) PMU.
This allows the perf subsystem clients to record the events
corresponding to the events related to L3 cache, snoop control
protocol, using its 32-bit counters.

Change-Id: Id38c3ece1d1e2533b53604e327254c07fa079755
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>

parent 04a8eb12

arch/arm64/boot/dts/qcom/sdm855.dtsi

+7 −0

Original line number	Diff line number	Diff line
		@@ -1203,6 +1203,13 @@
		interrupts = <1 5 4>;
		};

		dsu_pmu@0 {
		compatible = "arm,dsu-pmu";
		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
		cpus = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>,
		<&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
		};

		qcom,msm-imem@146bf000 {
		compatible = "qcom,msm-imem";
		reg = <0x146bf000 0x1000>;