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Commit ef22c8bb authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50/disp: call into core to handle dac/sor power state changes 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 2d0aca21

drivers/gpu/drm/nouveau/core/engine/disp/nv50.c

+11 −1
Original line number Diff line number Diff line
@@ -653,9 +653,17 @@ nv50_disp_base_ofuncs = { 
	.fini = nv50_disp_base_fini,

};



static struct nouveau_omthds

nv50_disp_base_omthds[] = {

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_PWR)         , nv50_dac_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_LOAD)        , nv50_dac_mthd },

	{},

};



static struct nouveau_oclass

nv50_disp_base_oclass[] = {

	{ NV50_DISP_CLASS, &nv50_disp_base_ofuncs },

	{ NV50_DISP_CLASS, &nv50_disp_base_ofuncs, nv50_disp_base_omthds },

	{}

};
@@ -798,6 +806,8 @@ nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->head.nr = 2;

	priv->dac.nr = 3;

	priv->sor.nr = 2;

	priv->dac.power = nv50_dac_power;

	priv->sor.power = nv50_sor_power;



	INIT_LIST_HEAD(&priv->base.vblank.list);

	spin_lock_init(&priv->base.vblank.lock);

drivers/gpu/drm/nouveau/core/engine/disp/nv50.h

+4 −2
Original line number Diff line number Diff line
@@ -38,8 +38,6 @@ struct nv50_disp_priv { 
	} sor;

};



extern struct nouveau_omthds nva3_disp_base_omthds[];



#define DAC_MTHD(n) (n), (n) + 0x03



int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
@@ -107,6 +105,10 @@ extern struct nouveau_ofuncs nv50_disp_base_ofuncs; 
extern struct nouveau_oclass nv50_disp_cclass;

void nv50_disp_intr(struct nouveau_subdev *);



extern struct nouveau_omthds nv84_disp_base_omthds[];



extern struct nouveau_omthds nva3_disp_base_omthds[];



extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;

extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;

drivers/gpu/drm/nouveau/core/engine/disp/nv84.c

+12 −1
Original line number Diff line number Diff line
@@ -39,9 +39,18 @@ nv84_disp_sclass[] = { 
	{}

};



struct nouveau_omthds

nv84_disp_base_omthds[] = {

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ SOR_MTHD(NV84_DISP_SOR_HDMI_PWR)    , nv50_sor_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_PWR)         , nv50_dac_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_LOAD)        , nv50_dac_mthd },

	{},

};



static struct nouveau_oclass

nv84_disp_base_oclass[] = {

	{ NV84_DISP_CLASS, &nv50_disp_base_ofuncs },

	{ NV84_DISP_CLASS, &nv50_disp_base_ofuncs, nv84_disp_base_omthds },

	{}

};
@@ -66,6 +75,8 @@ nv84_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->head.nr = 2;

	priv->dac.nr = 3;

	priv->sor.nr = 2;

	priv->dac.power = nv50_dac_power;

	priv->sor.power = nv50_sor_power;



	INIT_LIST_HEAD(&priv->base.vblank.list);

	spin_lock_init(&priv->base.vblank.lock);

drivers/gpu/drm/nouveau/core/engine/disp/nv94.c

+18 −1
Original line number Diff line number Diff line
@@ -39,9 +39,24 @@ nv94_disp_sclass[] = { 
	{}

};



static struct nouveau_omthds

nv94_disp_base_omthds[] = {

	{ SOR_MTHD(NV50_DISP_SOR_PWR)         , nv50_sor_mthd },

	{ SOR_MTHD(NV84_DISP_SOR_HDMI_PWR)    , nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_TRAIN)    , nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_LNKCTL)   , nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(0)), nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(1)), nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(2)), nv50_sor_mthd },

	{ SOR_MTHD(NV94_DISP_SOR_DP_DRVCTL(3)), nv50_sor_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_PWR)         , nv50_dac_mthd },

	{ DAC_MTHD(NV50_DISP_DAC_LOAD)        , nv50_dac_mthd },

	{},

};



static struct nouveau_oclass

nv94_disp_base_oclass[] = {

	{ NV94_DISP_CLASS, &nv50_disp_base_ofuncs },

	{ NV94_DISP_CLASS, &nv50_disp_base_ofuncs, nv94_disp_base_omthds },

	{}

};
@@ -66,6 +81,8 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->head.nr = 2;

	priv->dac.nr = 3;

	priv->sor.nr = 4;

	priv->dac.power = nv50_dac_power;

	priv->sor.power = nv50_sor_power;



	INIT_LIST_HEAD(&priv->base.vblank.list);

	spin_lock_init(&priv->base.vblank.lock);

drivers/gpu/drm/nouveau/core/engine/disp/nva0.c

+3 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ nva0_disp_sclass[] = { 


static struct nouveau_oclass

nva0_disp_base_oclass[] = {

	{ NVA0_DISP_CLASS, &nv50_disp_base_ofuncs },

	{ NVA0_DISP_CLASS, &nv50_disp_base_ofuncs, nv84_disp_base_omthds },

	{}

};
@@ -66,6 +66,8 @@ nva0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->head.nr = 2;

	priv->dac.nr = 3;

	priv->sor.nr = 2;

	priv->dac.power = nv50_dac_power;

	priv->sor.power = nv50_sor_power;



	INIT_LIST_HEAD(&priv->base.vblank.list);

	spin_lock_init(&priv->base.vblank.lock);