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Commit ef11bdb3 authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Jani Nikula
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drm/i915/kbl: Introduce Kabylake platform defition.



Kabylake is a Intel® Processor containing Intel® HD Graphics
following Skylake.

It is Gen9p5, so it inherits everything from Skylake.

Let's start by adding the platform separated from Skylake
but reusing most of all features, functions etc. Later we
rebase the PCI-ID patch without is_skylake=1
so we don't replace what original Author did there.

Few IS_SKYLAKEs if statements are not being covered by this patch
on purpose:
   - Workarounds: Kabylake is derivated from Skylake H0 so no
     		  W/As apply here.
   - GuC: A following patch removes Kabylake support with an
     	  explanation: No firmware available yet.
   - DMC/CSR: Done in a separated patch since we need to be carefull
     	      and load the version for revision 7 since
	      Kabylake is Skylake H0.

v2: relative cleaner commit message and added the missed
    IS_KABYLAKE to intel_i2c.c as pointed out by Jani.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 7526ac19
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+10 −6
Original line number Diff line number Diff line
@@ -1253,18 +1253,21 @@ static int i915_frequency_info(struct seq_file *m, void *unused)

		max_freq = (IS_BROXTON(dev) ? rp_state_cap >> 0 :
			    rp_state_cap >> 16) & 0xff;
		max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1);
		max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ?
			     GEN9_FREQ_SCALER : 1);
		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
			   intel_gpu_freq(dev_priv, max_freq));

		max_freq = (rp_state_cap & 0xff00) >> 8;
		max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1);
		max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ?
			     GEN9_FREQ_SCALER : 1);
		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
			   intel_gpu_freq(dev_priv, max_freq));

		max_freq = (IS_BROXTON(dev) ? rp_state_cap >> 16 :
			    rp_state_cap >> 0) & 0xff;
		max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1);
		max_freq *= (IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ?
			     GEN9_FREQ_SCALER : 1);
		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
			   intel_gpu_freq(dev_priv, max_freq));
		seq_printf(m, "Max overclocked frequency: %dMHz\n",
@@ -1802,7 +1805,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
	if (ret)
		goto out;

	if (IS_SKYLAKE(dev)) {
	if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) {
		/* Convert GT frequency to 50 HZ units */
		min_gpu_freq =
			dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER;
@@ -1822,7 +1825,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
				       &ia_freq);
		seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
			   intel_gpu_freq(dev_priv, (gpu_freq *
				(IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1))),
				(IS_SKYLAKE(dev) || IS_KABYLAKE(dev) ?
				 GEN9_FREQ_SCALER : 1))),
			   ((ia_freq >> 0) & 0xff) * 100,
			   ((ia_freq >> 8) & 0xff) * 100);
	}
@@ -5030,7 +5034,7 @@ static void gen9_sseu_device_status(struct drm_device *dev,

		stat->slice_total++;

		if (IS_SKYLAKE(dev))
		if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
			ss_cnt = INTEL_INFO(dev)->subslice_per_slice;

		for (ss = 0; ss < ss_max; ss++) {
+2 −1
Original line number Diff line number Diff line
@@ -697,7 +697,8 @@ static void gen9_sseu_info_init(struct drm_device *dev)
	 * supports EU power gating on devices with more than one EU
	 * pair per subslice.
	*/
	info->has_slice_pg = (IS_SKYLAKE(dev) && (info->slice_total > 1));
	info->has_slice_pg = ((IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) &&
			       (info->slice_total > 1));
	info->has_subslice_pg = (IS_BROXTON(dev) && (info->subslice_total > 1));
	info->has_eu_pg = (info->eu_per_subslice > 2);
}
+38 −6
Original line number Diff line number Diff line
@@ -395,6 +395,36 @@ static const struct intel_device_info intel_broxton_info = {
	IVB_CURSOR_OFFSETS,
};

static const struct intel_device_info intel_kabylake_info = {
	.is_preliminary = 1,
	.is_kabylake = 1,
	.gen = 9,
	.num_pipes = 3,
	.need_gfx_hws = 1, .has_hotplug = 1,
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
	.has_llc = 1,
	.has_ddi = 1,
	.has_fpga_dbg = 1,
	.has_fbc = 1,
	GEN_DEFAULT_PIPEOFFSETS,
	IVB_CURSOR_OFFSETS,
};

static const struct intel_device_info intel_kabylake_gt3_info = {
	.is_preliminary = 1,
	.is_kabylake = 1,
	.gen = 9,
	.num_pipes = 3,
	.need_gfx_hws = 1, .has_hotplug = 1,
	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
	.has_llc = 1,
	.has_ddi = 1,
	.has_fpga_dbg = 1,
	.has_fbc = 1,
	GEN_DEFAULT_PIPEOFFSETS,
	IVB_CURSOR_OFFSETS,
};

/*
 * Make sure any device matches here are from most specific to most
 * general.  For example, since the Quanta match is based on the subsystem
@@ -461,7 +491,7 @@ static enum intel_pch intel_virt_detect_pch(struct drm_device *dev)
	} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
		ret = PCH_LPT;
		DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
	} else if (IS_SKYLAKE(dev)) {
	} else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) {
		ret = PCH_SPT;
		DRM_DEBUG_KMS("Assuming SunrisePoint PCH\n");
	}
@@ -524,11 +554,13 @@ void intel_detect_pch(struct drm_device *dev)
			} else if (id == INTEL_PCH_SPT_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_SPT;
				DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
				WARN_ON(!IS_SKYLAKE(dev));
				WARN_ON(!IS_SKYLAKE(dev) &&
					!IS_KABYLAKE(dev));
			} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
				dev_priv->pch_type = PCH_SPT;
				DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
				WARN_ON(!IS_SKYLAKE(dev));
				WARN_ON(!IS_SKYLAKE(dev) &&
					!IS_KABYLAKE(dev));
			} else if (id == INTEL_PCH_P2X_DEVICE_ID_TYPE) {
				dev_priv->pch_type = intel_virt_detect_pch(dev);
			} else
@@ -836,7 +868,7 @@ static int i915_drm_resume_early(struct drm_device *dev)

	if (IS_BROXTON(dev))
		ret = bxt_resume_prepare(dev_priv);
	else if (IS_SKYLAKE(dev_priv))
	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
		ret = skl_resume_prepare(dev_priv);
	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
		hsw_disable_pc8(dev_priv);
@@ -1583,7 +1615,7 @@ static int intel_runtime_resume(struct device *device)

	if (IS_BROXTON(dev))
		ret = bxt_resume_prepare(dev_priv);
	else if (IS_SKYLAKE(dev))
	else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
		ret = skl_resume_prepare(dev_priv);
	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
		hsw_disable_pc8(dev_priv);
@@ -1627,7 +1659,7 @@ static int intel_suspend_complete(struct drm_i915_private *dev_priv)

	if (IS_BROXTON(dev_priv))
		ret = bxt_suspend_complete(dev_priv);
	else if (IS_SKYLAKE(dev_priv))
	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
		ret = skl_suspend_complete(dev_priv);
	else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
		ret = hsw_suspend_complete(dev_priv);
+4 −2
Original line number Diff line number Diff line
@@ -766,6 +766,7 @@ struct intel_csr {
	func(is_haswell) sep \
	func(is_skylake) sep \
	func(is_broxton) sep \
	func(is_kabylake) sep \
	func(is_preliminary) sep \
	func(has_fbc) sep \
	func(has_pipe_cxsr) sep \
@@ -2478,6 +2479,7 @@ struct drm_i915_cmd_table {
#define IS_BROADWELL(dev)	(!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
#define IS_SKYLAKE(dev)	(INTEL_INFO(dev)->is_skylake)
#define IS_BROXTON(dev)		(INTEL_INFO(dev)->is_broxton)
#define IS_KABYLAKE(dev)	(INTEL_INFO(dev)->is_kabylake)
#define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
#define IS_HSW_EARLY_SDV(dev)	(IS_HASWELL(dev) && \
				 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
@@ -2598,10 +2600,10 @@ struct drm_i915_cmd_table {
#define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
				 IS_SKYLAKE(dev))
				 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
				 IS_SKYLAKE(dev))
				 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
#define HAS_RC6(dev)		(INTEL_INFO(dev)->gen >= 6)
#define HAS_RC6p(dev)		(INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))

+2 −1
Original line number Diff line number Diff line
@@ -433,7 +433,8 @@ int i915_gem_init_stolen(struct drm_device *dev)
					 &reserved_size);
		break;
	default:
		if (IS_BROADWELL(dev_priv) || IS_SKYLAKE(dev_priv))
		if (IS_BROADWELL(dev_priv) ||
		    IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev))
			bdw_get_stolen_reserved(dev_priv, &reserved_base,
						&reserved_size);
		else
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