Commit eec10feb authored Jan 19, 2018 by David Collins

clk: qcom: clk-spmi-pmic-div: avoid potential divide-by-0



Add a check of the cxo_hz value to ensure that it is greater than
0.  That way, there is no chance of division by zero when using
cxo_hz to calculate cxo_period_ns.

Change-Id: I5498b7a08e4cb3be45469041a973d045f2ec2bdb
Signed-off-by: David Collins <collinsd@codeaurora.org>

parent 177f86fb

drivers/clk/qcom/clk-spmi-pmic-div.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -255,6 +255,10 @@ static int spmi_pmic_clkdiv_probe(struct platform_device *pdev)
		}
		cxo_hz = clk_get_rate(cxo);
		clk_put(cxo);
		if (cxo_hz <= 0) {
		dev_err(dev, "invalid CXO rate: %d\n", cxo_hz);
		return -EINVAL;
		}

		parent_name = of_clk_get_parent_name(of_node, 0);
		if (!parent_name) {