Loading arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +17 −0 Original line number Diff line number Diff line Loading @@ -2534,30 +2534,47 @@ }; &bps_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &ife_0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &ife_1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &ipe_0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &ipe_1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &titan_top_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &mdss_core_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_DISP_AHB_CLK>; status = "ok"; }; Loading Loading
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +17 −0 Original line number Diff line number Diff line Loading @@ -2534,30 +2534,47 @@ }; &bps_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &ife_0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &ife_1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &ipe_0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &ipe_1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &titan_top_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; status = "ok"; }; &mdss_core_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_DISP_AHB_CLK>; status = "ok"; }; Loading