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Commit ee6c2868 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

iommu/amd: Convert dev_table_entry to u64 



Convert the contents of 'struct dev_table_entry' to u64 to
allow updating the DTE wit 64bit writes as required by the
spec.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent dc47ce90

drivers/iommu/amd_iommu.c

+10 −8
Original line number Diff line number Diff line
@@ -365,8 +365,8 @@ static void dump_dte_entry(u16 devid) 
{

	int i;



	for (i = 0; i < 8; ++i)

		pr_err("AMD-Vi: DTE[%d]: %08x\n", i,

	for (i = 0; i < 4; ++i)

		pr_err("AMD-Vi: DTE[%d]: %016llx\n", i,

			amd_iommu_dev_table[devid].data[i]);

}
@@ -1583,19 +1583,22 @@ static bool dma_ops_domain(struct protection_domain *domain) 
static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats)

{

	u64 pte_root = virt_to_phys(domain->pt_root);

	u32 flags = 0;

	u64 flags = 0;



	pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)

		    << DEV_ENTRY_MODE_SHIFT;

	pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;



	flags = amd_iommu_dev_table[devid].data[1];



	if (ats)

		flags |= DTE_FLAG_IOTLB;



	amd_iommu_dev_table[devid].data[3] |= flags;

	amd_iommu_dev_table[devid].data[2]  = domain->id;

	amd_iommu_dev_table[devid].data[1]  = upper_32_bits(pte_root);

	amd_iommu_dev_table[devid].data[0]  = lower_32_bits(pte_root);

	flags &= ~(0xffffUL);

	flags |= domain->id;



	amd_iommu_dev_table[devid].data[1]  = flags;

	amd_iommu_dev_table[devid].data[0]  = pte_root;

}



static void clear_dte_entry(u16 devid)
@@ -1603,7 +1606,6 @@ static void clear_dte_entry(u16 devid) 
	/* remove entry from the device table seen by the hardware */

	amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;

	amd_iommu_dev_table[devid].data[1] = 0;

	amd_iommu_dev_table[devid].data[2] = 0;



	amd_iommu_apply_erratum_63(devid);

}

drivers/iommu/amd_iommu_init.c

+6 −6
Original line number Diff line number Diff line
@@ -584,18 +584,18 @@ static void __init free_event_buffer(struct amd_iommu *iommu) 
/* sets a specific bit in the device table entry. */

static void set_dev_entry_bit(u16 devid, u8 bit)

{

	int i = (bit >> 5) & 0x07;

	int _bit = bit & 0x1f;

	int i = (bit >> 6) & 0x03;

	int _bit = bit & 0x3f;



	amd_iommu_dev_table[devid].data[i] |= (1 << _bit);

	amd_iommu_dev_table[devid].data[i] |= (1UL << _bit);

}



static int get_dev_entry_bit(u16 devid, u8 bit)

{

	int i = (bit >> 5) & 0x07;

	int _bit = bit & 0x1f;

	int i = (bit >> 6) & 0x03;

	int _bit = bit & 0x3f;



	return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit;

	return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit;

}

drivers/iommu/amd_iommu_types.h

+2 −2
Original line number Diff line number Diff line
@@ -230,7 +230,7 @@ 
#define IOMMU_PTE_IR (1ULL << 61)

#define IOMMU_PTE_IW (1ULL << 62)



#define DTE_FLAG_IOTLB	0x01

#define DTE_FLAG_IOTLB	(0x01UL << 32)



#define IOMMU_PAGE_MASK (((1ULL << 52) - 1) & ~0xfffULL)

#define IOMMU_PTE_PRESENT(pte) ((pte) & IOMMU_PTE_P)
@@ -484,7 +484,7 @@ extern struct list_head amd_iommu_pd_list; 
 * Structure defining one entry in the device table

 */

struct dev_table_entry {

	u32 data[8];

	u64 data[4];

};



/*