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Commit edfbe043 authored by Jeevan Shriram's avatar Jeevan Shriram
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ARM: dts: msm: Add support for cdsp PIL for sdmshrike 



Add PIL node for cdsp for bringing firmware out of reset on
sdmshrike target.

Change-Id: Iea66e2c453e9d7e04c28a5a4eadc4e4b79b4b09d
Signed-off-by: default avatarJeevan Shriram <jshriram@codeaurora.org>
parent 75958773

arch/arm64/boot/dts/qcom/sdmshrike.dtsi

+44 −0
Original line number Diff line number Diff line
@@ -1160,6 +1160,50 @@ 
		qcom,smem-state-names = "qcom,force-stop";

	};



	qcom,turing@8300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x8300000 0x100000>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";



		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <601>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&pil_cdsp_mem>;



		qcom,msm-bus,name = "pil-cdsp";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<154 10070 0 0>,

			<154 10070 0 1>;



		/* Inputs from turing */

		interrupts-extended = <&pdc 0 578 1>,

				<&cdsp_smp2p_in 0 0>,

				<&cdsp_smp2p_in 2 0>,

				<&cdsp_smp2p_in 1 0>,

				<&cdsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to turing */

		qcom,smem-states = <&cdsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";

	};



	wdog: qcom,wdt@17c10000 {

		compatible = "qcom,msm-watchdog";

		reg = <0x17c10000 0x1000>;