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Commit ed5c8c85 authored by Ingo Molnar's avatar Ingo Molnar
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Merge branch 'linus' into sched/core, to pick up fixes and refresh the branch



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 619bd4a7 a2ca3d61
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+0 −12
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What:		/sys/devices/.../deferred_probe
Date:		August 2016
Contact:	Ben Hutchings <ben.hutchings@codethink.co.uk>
Description:
		The /sys/devices/.../deferred_probe attribute is
		present for all devices.  If a driver detects during
		probing a device that a related device is not yet
		ready, it may defer probing of the first device.  The
		kernel will retry probing the first device after any
		other device is successfully probed.  This attribute
		reads as 1 if probing of this device is currently
		deferred, or 0 otherwise.
+8 −0
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@@ -62,6 +62,9 @@ wants to support one of the below features, it should adapt the bindings below.
	"irq" and "wakeup" names are recognized by I2C core, other names are
	left to individual drivers.

- host-notify
	device uses SMBus host notify protocol instead of interrupt line.

- multi-master
	states that there is another master active on this bus. The OS can use
	this information to adapt power management to keep the arbitration awake
@@ -81,6 +84,11 @@ Binding may contain optional "interrupts" property, describing interrupts
used by the device. I2C core will assign "irq" interrupt (or the very first
interrupt if not using interrupt names) as primary interrupt for the slave.

Alternatively, devices supporting SMbus Host Notify, and connected to
adapters that support this feature, may use "host-notify" property. I2C
core will create a virtual interrupt for Host Notify and assign it as
primary interrupt for the slave.

Also, if device is marked as a wakeup source, I2C core will set up "wakeup"
interrupt for the device. If "wakeup" interrupt name is not present in the
binding, then primary interrupt will be used as wakeup interrupt.
+3 −0
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@@ -15,6 +15,9 @@ Properties:
  Second cell specifies the irq distribution mode to cores
     0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3

  The second cell in interrupts property is deprecated and may be ignored by
  the kernel.

  intc accessed via the special ARC AUX register interface, hence "reg" property
  is not specified.

+3 −3
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@@ -5,7 +5,7 @@ Required properties:
- compatible: "sigma,smp8758-nand"
- reg: address/size of nfc_reg, nfc_mem, and pbus_reg
- dmas: reference to the DMA channel used by the controller
- dma-names: "nfc_sbox"
- dma-names: "rxtx"
- clocks: reference to the system clock
- #address-cells: <1>
- #size-cells: <0>
@@ -17,9 +17,9 @@ Example:

	nandc: nand-controller@2c000 {
		compatible = "sigma,smp8758-nand";
		reg = <0x2c000 0x30 0x2d000 0x800 0x20000 0x1000>;
		reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>;
		dmas = <&dma0 3>;
		dma-names = "nfc_sbox";
		dma-names = "rxtx";
		clocks = <&clkgen SYS_CLK>;
		#address-cells = <1>;
		#size-cells = <0>;
+1 −1
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@@ -7,7 +7,7 @@ have dual GMAC each represented by a child node..
* Ethernet controller node

Required properties:
- compatible: Should be "mediatek,mt7623-eth"
- compatible: Should be "mediatek,mt2701-eth"
- reg: Address and length of the register set for the device
- interrupts: Should contain the three frame engines interrupts in numeric
	order. These are fe_int0, fe_int1 and fe_int2.
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