Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ed14a3ce authored by Amber Jain's avatar Amber Jain Committed by Tomi Valkeinen
Browse files

OMAP: DSS2: Ensure non-zero FIR values are configured 



FIR values can never be zero as per TRM, and the current code writes zero
when scaling is not used. It was not causing any problem as scaling was
disabled when zero was written. Its still safer to not write zero to
it in any case.
Now we configure correct FIR values even when scaling is not used (i.e. set FIR
to 1024 when scaling is not used), but the scaling enable bits are still kept
off if the scaling is not needed.

Signed-off-by: default avatarAmber Jain <amber@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent f20e4220

drivers/video/omap2/dss/dispc.c

+4 −11
Original line number Original line Diff line number Diff line
@@ -1128,14 +1128,7 @@ static void _dispc_set_scaling(enum omap_plane plane, 




	_dispc_set_scale_coef(plane, hscaleup, vscaleup, five_taps);

	_dispc_set_scale_coef(plane, hscaleup, vscaleup, five_taps);





	if (!orig_width || orig_width == out_width)

		fir_hinc = 0;

	else

	fir_hinc = 1024 * orig_width / out_width;

	fir_hinc = 1024 * orig_width / out_width;



	if (!orig_height || orig_height == out_height)

		fir_vinc = 0;

	else

	fir_vinc = 1024 * orig_height / out_height;

	fir_vinc = 1024 * orig_height / out_height;





	_dispc_set_fir(plane, fir_hinc, fir_vinc);

	_dispc_set_fir(plane, fir_hinc, fir_vinc);
@@ -1144,8 +1137,8 @@ static void _dispc_set_scaling(enum omap_plane plane, 




	/* RESIZEENABLE and VERTICALTAPS */

	/* RESIZEENABLE and VERTICALTAPS */

	l &= ~((0x3 << 5) | (0x1 << 21));

	l &= ~((0x3 << 5) | (0x1 << 21));

	l |= fir_hinc ? (1 << 5) : 0;

	l |= (orig_width != out_width) ? (1 << 5) : 0;

	l |= fir_vinc ? (1 << 6) : 0;

	l |= (orig_height != out_height) ? (1 << 6) : 0;

	l |= five_taps ? (1 << 21) : 0;

	l |= five_taps ? (1 << 21) : 0;





	/* VRESIZECONF and HRESIZECONF */

	/* VRESIZECONF and HRESIZECONF */