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Commit eca2240f authored by Nils Wallménius's avatar Nils Wallménius Committed by Alex Deucher
Browse files

drm/amdgpu: mark amdgpu_allowed_register_entry tables as 'const' 



Signed-off-by: default avatarNils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 379548f5

drivers/gpu/drm/amd/amdgpu/cik.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -962,7 +962,7 @@ static bool cik_read_bios_from_rom(struct amdgpu_device *adev, 
	return true;

	return true;

}

}





static struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = {

static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = {

	{mmGRBM_STATUS, false},

	{mmGRBM_STATUS, false},

	{mmGB_ADDR_CONFIG, false},

	{mmGB_ADDR_CONFIG, false},

	{mmMC_ARB_RAMCFG, false},

	{mmMC_ARB_RAMCFG, false},

drivers/gpu/drm/amd/amdgpu/vi.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -414,11 +414,11 @@ static bool vi_read_bios_from_rom(struct amdgpu_device *adev, 
	return true;

	return true;

}

}





static struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = {

static const struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = {

	{mmGB_MACROTILE_MODE7, true},

	{mmGB_MACROTILE_MODE7, true},

};

};





static struct amdgpu_allowed_register_entry cz_allowed_read_registers[] = {

static const struct amdgpu_allowed_register_entry cz_allowed_read_registers[] = {

	{mmGB_TILE_MODE7, true},

	{mmGB_TILE_MODE7, true},

	{mmGB_TILE_MODE12, true},

	{mmGB_TILE_MODE12, true},

	{mmGB_TILE_MODE17, true},

	{mmGB_TILE_MODE17, true},
@@ -426,7 +426,7 @@ static struct amdgpu_allowed_register_entry cz_allowed_read_registers[] = { 
	{mmGB_MACROTILE_MODE7, true},

	{mmGB_MACROTILE_MODE7, true},

};

};





static struct amdgpu_allowed_register_entry vi_allowed_read_registers[] = {

static const struct amdgpu_allowed_register_entry vi_allowed_read_registers[] = {

	{mmGRBM_STATUS, false},

	{mmGRBM_STATUS, false},

	{mmGRBM_STATUS2, false},

	{mmGRBM_STATUS2, false},

	{mmGRBM_STATUS_SE0, false},

	{mmGRBM_STATUS_SE0, false},
@@ -525,8 +525,8 @@ static uint32_t vi_read_indexed_register(struct amdgpu_device *adev, u32 se_num, 
static int vi_read_register(struct amdgpu_device *adev, u32 se_num,

static int vi_read_register(struct amdgpu_device *adev, u32 se_num,

			    u32 sh_num, u32 reg_offset, u32 *value)

			    u32 sh_num, u32 reg_offset, u32 *value)

{

{

	struct amdgpu_allowed_register_entry *asic_register_table = NULL;

	const struct amdgpu_allowed_register_entry *asic_register_table = NULL;

	struct amdgpu_allowed_register_entry *asic_register_entry;

	const struct amdgpu_allowed_register_entry *asic_register_entry;

	uint32_t size, i;

	uint32_t size, i;





	*value = 0;

	*value = 0;