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Commit ec741aea authored by Sahil Chandna's avatar Sahil Chandna Committed by Gerrit - the friendly Code Review server
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power: qpnp-fg-gen4: Add support for weighted capacity learning 



Add support to loosen capacity learning qualifying criterion.
This helps to learn capacity from any starting battery SOC to
any ending battery SOC, provided, battery SOC changes by at least
10 % during charging. Assign weight to this capacity learning
event based on the change in battery SOC.

Change-Id: I67cf2e810649c9d77b7aeca79e235be4ab01027f
Signed-off-by: default avatarSahil Chandna <chandna@codeaurora.org>
parent cf063791

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen4.txt

+14 −0
Original line number Diff line number Diff line
@@ -245,6 +245,20 @@ First Level Node - FG Gen4 device 
		    capacity learning cycle. If this is not specified, then

		    the default value is 0. Unit is in decipercentage.



- qcom,cl-min-delta-batt-soc

	Usage:      optional

	Value type: <u32>

	Definition: Minimum change in battery SOC to qualify for capacity

		    learning. If this is not specified, then the default

		    value is 10. Unit is in percentage.



- qcom,cl-wt-enable

	Usage:      optional

	Value type: <empty>

	Definition: A boolean property to enable weighted capacity learning

		    based on change in battery SOC during a charging cycle.

		    If this is specified "qcom,cl-start-capacity" is not used.



- qcom,hold-soc-while-full

	Usage:      optional

	Value type: <empty>

drivers/power/supply/qcom/qpnp-fg-gen4.c

+9 −0
Original line number Diff line number Diff line
@@ -4363,6 +4363,7 @@ static int fg_parse_esr_cal_params(struct fg_dev *fg) 
#define DEFAULT_CL_MAX_DEC_DECIPERC	100

#define DEFAULT_CL_MIN_LIM_DECIPERC	0

#define DEFAULT_CL_MAX_LIM_DECIPERC	0

#define DEFAULT_CL_DELTA_BATT_SOC	10

#define BTEMP_DELTA_LOW			0

#define BTEMP_DELTA_HIGH		3

#define DEFAULT_ESR_PULSE_THRESH_MA	47
@@ -4529,6 +4530,14 @@ static int fg_gen4_parse_dt(struct fg_gen4_chip *chip) 
	else

		chip->cl->dt.max_start_soc = temp;



	chip->cl->dt.min_delta_batt_soc = DEFAULT_CL_DELTA_BATT_SOC;

	/* read from DT property and update, if value exists */

	of_property_read_u32(node, "qcom,cl-min-delta-batt-soc",

					&chip->cl->dt.min_delta_batt_soc);



	chip->cl->dt.cl_wt_enable = of_property_read_bool(node,

						"qcom,cl-wt-enable");



	rc = of_property_read_u32(node, "qcom,cl-min-temp", &temp);

	if (rc < 0)

		chip->cl->dt.min_temp = DEFAULT_CL_MIN_TEMP_DECIDEGC;