[libata] sata_svw: update code comments relating to data corruption

	/* start host DMA transaction */

	/* start host DMA transaction */

	dmactl = readb(mmio + ATA_DMA_CMD);

	dmactl = readb(mmio + ATA_DMA_CMD);

	writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);

	writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);

	/* There is a race condition in certain SATA controllers that can

	/* This works around possible data corruption.

	   be seen when the r/w command is given to the controller before the

	   host DMA is started. On a Read command, the controller would initiate

	   On certain SATA controllers that can be seen when the r/w

	   the command to the drive even before it sees the DMA start. When there

	   command is given to the controller before the host DMA is

	   are very fast drives connected to the controller, or when the data request

	   started.

	   hits in the drive cache, there is the possibility that the drive returns a part

	   or all of the requested data to the controller before the DMA start is issued.

	   On a Read command, the controller would initiate the

	   In this case, the controller would become confused as to what to do with the data.

	   command to the drive even before it sees the DMA

	   In the worst case when all the data is returned back to the controller, the

	   start. When there are very fast drives connected to the

	   controller could hang. In other cases it could return partial data returning

	   controller, or when the data request hits in the drive

	   in data corruption. This problem has been seen in PPC systems and can also appear

	   cache, there is the possibility that the drive returns a

	   on an system with very fast disks, where the SATA controller is sitting behind a

	   part or all of the requested data to the controller before

	   number of bridges, and hence there is significant latency between the r/w command

	   the DMA start is issued.  In this case, the controller

	   and the start command. */

	   would become confused as to what to do with the data.  In

	   the worst case when all the data is returned back to the

	   controller, the controller could hang. In other cases it

	   could return partial data returning in data

	   corruption. This problem has been seen in PPC systems and

	   can also appear on an system with very fast disks, where

	   the SATA controller is sitting behind a number of bridges,

	   and hence there is significant latency between the r/w

	   command and the start command. */

	/* issue r/w command if the access is to ATA */

	/* issue r/w command if the access is to ATA */

	if (qc->tf.protocol == ATA_PROT_DMA)

	if (qc->tf.protocol == ATA_PROT_DMA)

		ap->ops->sff_exec_command(ap, &qc->tf);

		ap->ops->sff_exec_command(ap, &qc->tf);