Loading Documentation/devicetree/bindings/iommu/arm,smmu.txt +9 −0 Original line number Diff line number Diff line Loading @@ -137,6 +137,15 @@ conditions. and end of all mapped buffers to prefetch size boundary, which is defined by ARM_SMMU_MIN_IOVA_ALIGN. - qcom,no-dynamic-asid: Clients that uses the dynamic domains will have an unique asid per each domain and all domains can share the same context bank. When ASID based invalidation is used, on some hardware revisions, as a result of multiple ASID's associated with the same context bank, TLB entries are not invalidated properly. On such systems, we can choose to have a single ASID associated with all domains for a context bank. - clocks : List of clocks to be used during SMMU register access. See Documentation/devicetree/bindings/clock/clock-bindings.txt for information about the format. For each clock specified Loading drivers/iommu/arm-smmu.c +3 −1 Original line number Diff line number Diff line Loading @@ -258,6 +258,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_STATIC_CB (1 << 6) #define ARM_SMMU_OPT_DISABLE_ATOS (1 << 7) #define ARM_SMMU_OPT_MIN_IOVA_ALIGN (1 << 8) #define ARM_SMMU_OPT_NO_DYNAMIC_ASID (1 << 9) u32 options; enum arm_smmu_arch_version version; enum arm_smmu_implementation model; Loading Loading @@ -398,6 +399,7 @@ static struct arm_smmu_option_prop arm_smmu_options[] = { { ARM_SMMU_OPT_STATIC_CB, "qcom,enable-static-cb"}, { ARM_SMMU_OPT_DISABLE_ATOS, "qcom,disable-atos" }, { ARM_SMMU_OPT_MIN_IOVA_ALIGN, "qcom,min-iova-align" }, { ARM_SMMU_OPT_NO_DYNAMIC_ASID, "qcom,no-dynamic-asid" }, { 0, NULL}, }; Loading Loading @@ -1844,7 +1846,7 @@ static int arm_smmu_init_asid(struct iommu_domain *domain, bool dynamic = is_dynamic_domain(domain); int ret; if (!dynamic) { if (!dynamic || (smmu->options & ARM_SMMU_OPT_NO_DYNAMIC_ASID)) { cfg->asid = cfg->cbndx + 1; } else { mutex_lock(&smmu->idr_mutex); Loading Loading
Documentation/devicetree/bindings/iommu/arm,smmu.txt +9 −0 Original line number Diff line number Diff line Loading @@ -137,6 +137,15 @@ conditions. and end of all mapped buffers to prefetch size boundary, which is defined by ARM_SMMU_MIN_IOVA_ALIGN. - qcom,no-dynamic-asid: Clients that uses the dynamic domains will have an unique asid per each domain and all domains can share the same context bank. When ASID based invalidation is used, on some hardware revisions, as a result of multiple ASID's associated with the same context bank, TLB entries are not invalidated properly. On such systems, we can choose to have a single ASID associated with all domains for a context bank. - clocks : List of clocks to be used during SMMU register access. See Documentation/devicetree/bindings/clock/clock-bindings.txt for information about the format. For each clock specified Loading
drivers/iommu/arm-smmu.c +3 −1 Original line number Diff line number Diff line Loading @@ -258,6 +258,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_STATIC_CB (1 << 6) #define ARM_SMMU_OPT_DISABLE_ATOS (1 << 7) #define ARM_SMMU_OPT_MIN_IOVA_ALIGN (1 << 8) #define ARM_SMMU_OPT_NO_DYNAMIC_ASID (1 << 9) u32 options; enum arm_smmu_arch_version version; enum arm_smmu_implementation model; Loading Loading @@ -398,6 +399,7 @@ static struct arm_smmu_option_prop arm_smmu_options[] = { { ARM_SMMU_OPT_STATIC_CB, "qcom,enable-static-cb"}, { ARM_SMMU_OPT_DISABLE_ATOS, "qcom,disable-atos" }, { ARM_SMMU_OPT_MIN_IOVA_ALIGN, "qcom,min-iova-align" }, { ARM_SMMU_OPT_NO_DYNAMIC_ASID, "qcom,no-dynamic-asid" }, { 0, NULL}, }; Loading Loading @@ -1844,7 +1846,7 @@ static int arm_smmu_init_asid(struct iommu_domain *domain, bool dynamic = is_dynamic_domain(domain); int ret; if (!dynamic) { if (!dynamic || (smmu->options & ARM_SMMU_OPT_NO_DYNAMIC_ASID)) { cfg->asid = cfg->cbndx + 1; } else { mutex_lock(&smmu->idr_mutex); Loading