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Commit e92d4894 authored by Shefali Jain's avatar Shefali Jain Committed by Gerrit - the friendly Code Review server
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clk: qcom: gcc: Add global clock controller driver for QCS405



Add the clocks supported in global clock controller which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Change-Id: I6e88109c8221023ddae7a0b17051b00d233f65c4
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent 4cec0cd6
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+2 −0
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@@ -20,6 +20,8 @@ Required properties :
			"qcom,gcc-mdm9615"
			"qcom,gcc-mdm9615"
			"qcom,gcc-sm8150"
			"qcom,gcc-sm8150"
			"qcom,gcc-sdmshrike"
			"qcom,gcc-sdmshrike"
			"qcom,gcc-qcs405"
			"qcom,gcc-mdss-qcs405"


- reg : shall contain base register location and length
- reg : shall contain base register location and length
- #clock-cells : shall contain 1
- #clock-cells : shall contain 1
+9 −0
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@@ -315,3 +315,12 @@ config MSM_CAMCC_SDMSHRIKE
	  SDMSHRIKE devices.
	  SDMSHRIKE devices.
          Say Y if you want to support camera devices and functionality such as
          Say Y if you want to support camera devices and functionality such as
	  capturing pictures.
	  capturing pictures.

config MDM_GCC_QCS405
	tristate "QCS405 Global Clock Controller"
	depends on COMMON_CLK_QCOM
	help
	 Support for the global clock controller on Qualcomm Technologies, Inc
	 QCS405 devices.
	 Say Y if you want to use peripheral devices such as UART, SPI, I2C,
	 USB, SD/eMMC, PCIe, etc.
+1 −0
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@@ -25,6 +25,7 @@ obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o
obj-$(CONFIG_IPQ_GCC_8074) += gcc-ipq8074.o
obj-$(CONFIG_IPQ_GCC_8074) += gcc-ipq8074.o
obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o
obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o
obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o
obj-$(CONFIG_MDM_GCC_9615) += gcc-mdm9615.o
obj-$(CONFIG_MDM_GCC_QCS405) += gcc-qcs405.o
obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o
obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o
obj-$(CONFIG_MSM_CAMCC_SM8150) += camcc-sm8150.o
obj-$(CONFIG_MSM_CAMCC_SM8150) += camcc-sm8150.o
obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o
obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o
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/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_405_H
#define __DRIVERS_CLK_QCOM_VDD_LEVEL_405_H

#include <linux/regulator/rpm-smd-regulator.h>
#include <linux/regulator/consumer.h>

enum vdd_dig_levels {
	VDD_NONE,
	VDD_MIN,		/* MIN SVS */
	VDD_LOWER,		/* SVS2 */
	VDD_LOW,		/* SVS */
	VDD_LOW_L1,		/* SVSL1 */
	VDD_NOMINAL,	/* NOM */
	VDD_NOMINAL_L1,	/* NOM */
	VDD_HIGH,		/* TURBO */
	VDD_NUM,
};

static int vdd_corner[] = {
	RPM_REGULATOR_LEVEL_NONE,		/* VDD_NONE */
	RPM_REGULATOR_LEVEL_MIN_SVS,		/* VDD_MIN */
	RPM_REGULATOR_LEVEL_LOW_SVS,		/* VDD_LOWER */
	RPM_REGULATOR_LEVEL_SVS,		/* VDD_LOW */
	RPM_REGULATOR_LEVEL_SVS_PLUS,		/* VDD_LOW_L1 */
	RPM_REGULATOR_LEVEL_NOM,		/* VDD_NOMINAL */
	RPM_REGULATOR_LEVEL_NOM_PLUS,		/* VDD_NOMINAL */
	RPM_REGULATOR_LEVEL_TURBO,		/* VDD_HIGH */
};

#endif
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