Loading arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -421,7 +421,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dp &sde_dsi>; connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>; }; /* PHY TIMINGS REVISION P */ Loading arch/arm64/boot/dts/qcom/sm8150-sde-pll.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -79,8 +79,6 @@ reg-names = "pll_base", "phy_base", "ln_tx0_base", "ln_tx1_base", "gdsc_base"; gdsc-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_DISP_AHB_CLK>, Loading @@ -89,21 +87,6 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "ref_clk", "pipe_clk"; clock-rate = <0>; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "gdsc"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; }; arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +13 −45 Original line number Diff line number Diff line Loading @@ -24,17 +24,20 @@ clocks = <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_HF_AXI_CLK>, <&clock_gcc GCC_DISP_SF_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>; clock-names = "gcc_iface", "gcc_bus", <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>; clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk"; clock-rate = <0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 460000000 19200000 460000000>; "lut_clk", "rot_clk"; clock-rate = <0 0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 0 460000000 19200000 460000000>; sde-vdd-supply = <&mdss_core_gdsc>; mmcx-supply = <&VDD_MMCX_LEVEL>; /* interrupt config */ interrupts = <0 83 0>; Loading Loading @@ -246,7 +249,7 @@ qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "sde-vdd"; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; Loading @@ -261,33 +264,13 @@ /* data and reg bus scale settings */ qcom,sde-data-bus { qcom,msm-bus,name = "mdss_sde_mnoc"; qcom,msm-bus,name = "mdss_sde"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <22 773 0 0>, <23 773 0 0>, <22 773 0 6400000>, <23 773 0 6400000>, <22 773 0 6400000>, <23 773 0 6400000>; }; qcom,sde-llcc-bus { qcom,msm-bus,name = "mdss_sde_llcc"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <132 770 0 0>, <132 770 0 6400000>, <132 770 0 6400000>; }; qcom,sde-ebi-bus { qcom,msm-bus,name = "mdss_sde_ebi"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <129 512 0 0>, <129 512 0 6400000>, <129 512 0 6400000>; <22 512 0 0>, <23 512 0 0>, <22 512 0 6400000>, <23 512 0 6400000>, <22 512 0 6400000>, <23 512 0 6400000>; }; qcom,sde-reg-bus { Loading @@ -309,7 +292,6 @@ <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; qcom,sde-rsc-version = <2>; status = "disabled"; vdd-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_VSYNC_CLK>, Loading Loading @@ -356,20 +338,6 @@ <20000 20512 0 6400000>, <20000 20512 0 6400000>; }; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; mdss_rotator: qcom,mdss_rotator@ae00000 { Loading drivers/gpu/drm/msm/msm_atomic.c +87 −20 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2014 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading @@ -25,6 +25,8 @@ #include "msm_fence.h" #include "sde_trace.h" #define MULTIPLE_CONN_DETECTED(x) (x > 1) struct msm_commit { struct drm_device *dev; struct drm_atomic_state *state; Loading Loading @@ -111,6 +113,66 @@ static void commit_destroy(struct msm_commit *c) kfree(c); } static inline bool _msm_seamless_for_crtc(struct drm_atomic_state *state, struct drm_crtc_state *crtc_state, bool enable) { struct drm_connector *connector = NULL; struct drm_connector_state *conn_state = NULL; int i = 0; int conn_cnt = 0; if (msm_is_mode_seamless(&crtc_state->mode) || msm_is_mode_seamless_vrr(&crtc_state->adjusted_mode)) return true; if (msm_is_mode_seamless_dms(&crtc_state->adjusted_mode) && !enable) return true; if (!crtc_state->mode_changed && crtc_state->connectors_changed) { for_each_connector_in_state(state, connector, conn_state, i) { if ((conn_state->crtc == crtc_state->crtc) || (connector->state->crtc == crtc_state->crtc)) conn_cnt++; if (MULTIPLE_CONN_DETECTED(conn_cnt)) return true; } } return false; } static inline bool _msm_seamless_for_conn(struct drm_connector *connector, struct drm_connector_state *old_conn_state, bool enable) { if (!old_conn_state || !old_conn_state->crtc) return false; if (!old_conn_state->crtc->state->mode_changed && !old_conn_state->crtc->state->active_changed && old_conn_state->crtc->state->connectors_changed) { if (old_conn_state->crtc == connector->state->crtc) return true; } if (enable) return false; if (msm_is_mode_seamless(&connector->encoder->crtc->state->mode)) return true; if (msm_is_mode_seamless_vrr( &connector->encoder->crtc->state->adjusted_mode)) return true; if (msm_is_mode_seamless_dms( &connector->encoder->crtc->state->adjusted_mode)) return true; return false; } static void msm_atomic_wait_for_commit_done( struct drm_device *dev, struct drm_atomic_state *old_state) Loading Loading @@ -169,14 +231,7 @@ msm_disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state) if (WARN_ON(!encoder)) continue; if (msm_is_mode_seamless( &connector->encoder->crtc->state->mode) || msm_is_mode_seamless_vrr( &connector->encoder->crtc->state->adjusted_mode)) continue; if (msm_is_mode_seamless_dms( &connector->encoder->crtc->state->adjusted_mode)) if (_msm_seamless_for_conn(connector, old_conn_state, false)) continue; funcs = encoder->helper_private; Loading Loading @@ -218,11 +273,7 @@ msm_disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state) if (!old_crtc_state->active) continue; if (msm_is_mode_seamless(&crtc->state->mode) || msm_is_mode_seamless_vrr(&crtc->state->adjusted_mode)) continue; if (msm_is_mode_seamless_dms(&crtc->state->adjusted_mode)) if (_msm_seamless_for_crtc(old_state, crtc->state, false)) continue; funcs = crtc->helper_private; Loading Loading @@ -281,8 +332,14 @@ msm_crtc_set_mode(struct drm_device *dev, struct drm_atomic_state *old_state) mode = &new_crtc_state->mode; adjusted_mode = &new_crtc_state->adjusted_mode; if (!new_crtc_state->mode_changed) if (!new_crtc_state->mode_changed && new_crtc_state->connectors_changed) { if (_msm_seamless_for_conn(connector, old_conn_state, false)) continue; } else if (!new_crtc_state->mode_changed) { continue; } DRM_DEBUG_ATOMIC("modeset on [ENCODER:%d:%s]\n", encoder->base.id, encoder->name); Loading Loading @@ -362,9 +419,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, if (!new_crtc_state->active) continue; if (msm_is_mode_seamless(&new_crtc_state->mode) || msm_is_mode_seamless_vrr( &new_crtc_state->adjusted_mode)) if (_msm_seamless_for_crtc(old_state, crtc->state, true)) continue; funcs = crtc->helper_private; Loading @@ -389,6 +444,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state, i) { const struct drm_encoder_helper_funcs *funcs; struct drm_encoder *encoder; struct drm_connector_state *old_conn_state; if (!new_conn_state->best_encoder) continue; Loading @@ -398,7 +454,12 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state->crtc->state)) continue; encoder = new_conn_state->best_encoder; old_conn_state = drm_atomic_get_old_connector_state( old_state, connector); if (_msm_seamless_for_conn(connector, old_conn_state, true)) continue; encoder = connector->state->best_encoder; funcs = encoder->helper_private; DRM_DEBUG_ATOMIC("enabling [ENCODER:%d:%s]\n", Loading Loading @@ -437,6 +498,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, for_each_new_connector_in_state(old_state, connector, new_conn_state, i) { struct drm_encoder *encoder; struct drm_connector_state *old_conn_state; if (!new_conn_state->best_encoder) continue; Loading @@ -446,7 +508,12 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state->crtc->state)) continue; encoder = new_conn_state->best_encoder; old_conn_state = drm_atomic_get_old_connector_state( old_state, connector); if (_msm_seamless_for_conn(connector, old_conn_state, true)) continue; encoder = connector->state->best_encoder; DRM_DEBUG_ATOMIC("bridge enable enabling [ENCODER:%d:%s]\n", encoder->base.id, encoder->name); Loading drivers/gpu/drm/msm/msm_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -161,6 +161,7 @@ enum msm_mdp_crtc_property { CRTC_PROP_SECURITY_LEVEL, CRTC_PROP_IDLE_TIMEOUT, CRTC_PROP_DEST_SCALER, CRTC_PROP_CAPTURE_OUTPUT, /* total # of properties */ CRTC_PROP_COUNT Loading Loading
arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -421,7 +421,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dp &sde_dsi>; connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>; }; /* PHY TIMINGS REVISION P */ Loading
arch/arm64/boot/dts/qcom/sm8150-sde-pll.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -79,8 +79,6 @@ reg-names = "pll_base", "phy_base", "ln_tx0_base", "ln_tx1_base", "gdsc_base"; gdsc-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_DISP_AHB_CLK>, Loading @@ -89,21 +87,6 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "ref_clk", "pipe_clk"; clock-rate = <0>; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "gdsc"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; };
arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +13 −45 Original line number Diff line number Diff line Loading @@ -24,17 +24,20 @@ clocks = <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_HF_AXI_CLK>, <&clock_gcc GCC_DISP_SF_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>; clock-names = "gcc_iface", "gcc_bus", <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>; clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk"; clock-rate = <0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 460000000 19200000 460000000>; "lut_clk", "rot_clk"; clock-rate = <0 0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 0 460000000 19200000 460000000>; sde-vdd-supply = <&mdss_core_gdsc>; mmcx-supply = <&VDD_MMCX_LEVEL>; /* interrupt config */ interrupts = <0 83 0>; Loading Loading @@ -246,7 +249,7 @@ qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "sde-vdd"; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; Loading @@ -261,33 +264,13 @@ /* data and reg bus scale settings */ qcom,sde-data-bus { qcom,msm-bus,name = "mdss_sde_mnoc"; qcom,msm-bus,name = "mdss_sde"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <22 773 0 0>, <23 773 0 0>, <22 773 0 6400000>, <23 773 0 6400000>, <22 773 0 6400000>, <23 773 0 6400000>; }; qcom,sde-llcc-bus { qcom,msm-bus,name = "mdss_sde_llcc"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <132 770 0 0>, <132 770 0 6400000>, <132 770 0 6400000>; }; qcom,sde-ebi-bus { qcom,msm-bus,name = "mdss_sde_ebi"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <129 512 0 0>, <129 512 0 6400000>, <129 512 0 6400000>; <22 512 0 0>, <23 512 0 0>, <22 512 0 6400000>, <23 512 0 6400000>, <22 512 0 6400000>, <23 512 0 6400000>; }; qcom,sde-reg-bus { Loading @@ -309,7 +292,6 @@ <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; qcom,sde-rsc-version = <2>; status = "disabled"; vdd-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_VSYNC_CLK>, Loading Loading @@ -356,20 +338,6 @@ <20000 20512 0 6400000>, <20000 20512 0 6400000>; }; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; mdss_rotator: qcom,mdss_rotator@ae00000 { Loading
drivers/gpu/drm/msm/msm_atomic.c +87 −20 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2014 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading @@ -25,6 +25,8 @@ #include "msm_fence.h" #include "sde_trace.h" #define MULTIPLE_CONN_DETECTED(x) (x > 1) struct msm_commit { struct drm_device *dev; struct drm_atomic_state *state; Loading Loading @@ -111,6 +113,66 @@ static void commit_destroy(struct msm_commit *c) kfree(c); } static inline bool _msm_seamless_for_crtc(struct drm_atomic_state *state, struct drm_crtc_state *crtc_state, bool enable) { struct drm_connector *connector = NULL; struct drm_connector_state *conn_state = NULL; int i = 0; int conn_cnt = 0; if (msm_is_mode_seamless(&crtc_state->mode) || msm_is_mode_seamless_vrr(&crtc_state->adjusted_mode)) return true; if (msm_is_mode_seamless_dms(&crtc_state->adjusted_mode) && !enable) return true; if (!crtc_state->mode_changed && crtc_state->connectors_changed) { for_each_connector_in_state(state, connector, conn_state, i) { if ((conn_state->crtc == crtc_state->crtc) || (connector->state->crtc == crtc_state->crtc)) conn_cnt++; if (MULTIPLE_CONN_DETECTED(conn_cnt)) return true; } } return false; } static inline bool _msm_seamless_for_conn(struct drm_connector *connector, struct drm_connector_state *old_conn_state, bool enable) { if (!old_conn_state || !old_conn_state->crtc) return false; if (!old_conn_state->crtc->state->mode_changed && !old_conn_state->crtc->state->active_changed && old_conn_state->crtc->state->connectors_changed) { if (old_conn_state->crtc == connector->state->crtc) return true; } if (enable) return false; if (msm_is_mode_seamless(&connector->encoder->crtc->state->mode)) return true; if (msm_is_mode_seamless_vrr( &connector->encoder->crtc->state->adjusted_mode)) return true; if (msm_is_mode_seamless_dms( &connector->encoder->crtc->state->adjusted_mode)) return true; return false; } static void msm_atomic_wait_for_commit_done( struct drm_device *dev, struct drm_atomic_state *old_state) Loading Loading @@ -169,14 +231,7 @@ msm_disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state) if (WARN_ON(!encoder)) continue; if (msm_is_mode_seamless( &connector->encoder->crtc->state->mode) || msm_is_mode_seamless_vrr( &connector->encoder->crtc->state->adjusted_mode)) continue; if (msm_is_mode_seamless_dms( &connector->encoder->crtc->state->adjusted_mode)) if (_msm_seamless_for_conn(connector, old_conn_state, false)) continue; funcs = encoder->helper_private; Loading Loading @@ -218,11 +273,7 @@ msm_disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state) if (!old_crtc_state->active) continue; if (msm_is_mode_seamless(&crtc->state->mode) || msm_is_mode_seamless_vrr(&crtc->state->adjusted_mode)) continue; if (msm_is_mode_seamless_dms(&crtc->state->adjusted_mode)) if (_msm_seamless_for_crtc(old_state, crtc->state, false)) continue; funcs = crtc->helper_private; Loading Loading @@ -281,8 +332,14 @@ msm_crtc_set_mode(struct drm_device *dev, struct drm_atomic_state *old_state) mode = &new_crtc_state->mode; adjusted_mode = &new_crtc_state->adjusted_mode; if (!new_crtc_state->mode_changed) if (!new_crtc_state->mode_changed && new_crtc_state->connectors_changed) { if (_msm_seamless_for_conn(connector, old_conn_state, false)) continue; } else if (!new_crtc_state->mode_changed) { continue; } DRM_DEBUG_ATOMIC("modeset on [ENCODER:%d:%s]\n", encoder->base.id, encoder->name); Loading Loading @@ -362,9 +419,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, if (!new_crtc_state->active) continue; if (msm_is_mode_seamless(&new_crtc_state->mode) || msm_is_mode_seamless_vrr( &new_crtc_state->adjusted_mode)) if (_msm_seamless_for_crtc(old_state, crtc->state, true)) continue; funcs = crtc->helper_private; Loading @@ -389,6 +444,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state, i) { const struct drm_encoder_helper_funcs *funcs; struct drm_encoder *encoder; struct drm_connector_state *old_conn_state; if (!new_conn_state->best_encoder) continue; Loading @@ -398,7 +454,12 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state->crtc->state)) continue; encoder = new_conn_state->best_encoder; old_conn_state = drm_atomic_get_old_connector_state( old_state, connector); if (_msm_seamless_for_conn(connector, old_conn_state, true)) continue; encoder = connector->state->best_encoder; funcs = encoder->helper_private; DRM_DEBUG_ATOMIC("enabling [ENCODER:%d:%s]\n", Loading Loading @@ -437,6 +498,7 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, for_each_new_connector_in_state(old_state, connector, new_conn_state, i) { struct drm_encoder *encoder; struct drm_connector_state *old_conn_state; if (!new_conn_state->best_encoder) continue; Loading @@ -446,7 +508,12 @@ static void msm_atomic_helper_commit_modeset_enables(struct drm_device *dev, new_conn_state->crtc->state)) continue; encoder = new_conn_state->best_encoder; old_conn_state = drm_atomic_get_old_connector_state( old_state, connector); if (_msm_seamless_for_conn(connector, old_conn_state, true)) continue; encoder = connector->state->best_encoder; DRM_DEBUG_ATOMIC("bridge enable enabling [ENCODER:%d:%s]\n", encoder->base.id, encoder->name); Loading
drivers/gpu/drm/msm/msm_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -161,6 +161,7 @@ enum msm_mdp_crtc_property { CRTC_PROP_SECURITY_LEVEL, CRTC_PROP_IDLE_TIMEOUT, CRTC_PROP_DEST_SCALER, CRTC_PROP_CAPTURE_OUTPUT, /* total # of properties */ CRTC_PROP_COUNT Loading