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Commit e5971af7 authored by Sujeev Dias's avatar Sujeev Dias
Browse files

mhi: core: add support for dynamic bandwidth scaling 



Some MHI based devices support dynamic bandwidth scaling, based
on required throughput device will request required bandwidth.

CRs-Fixed: 2418347
Change-Id: I7903570eb225b2fe38a1fd425a23c63339f5f691
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent f332b4d1

drivers/bus/mhi/core/mhi_internal.h

+3 −0
Original line number Diff line number Diff line
@@ -336,6 +336,8 @@ enum mhi_cmd_type { 
#define MHI_TRE_GET_EV_TIME(tre) ((tre)->ptr)

#define MHI_TRE_GET_EV_COOKIE(tre) lower_32_bits((tre)->ptr)

#define MHI_TRE_GET_EV_VEID(tre) (((tre)->dword[0] >> 16) & 0xFF)

#define MHI_TRE_GET_EV_LINKSPEED(tre) (((tre)->dword[1] >> 24) & 0xFF)

#define MHI_TRE_GET_EV_LINKWIDTH(tre) ((tre)->dword[0] & 0xFF)



/* transfer descriptor macros */

#define MHI_TRE_DATA_PTR(ptr) (ptr)
@@ -368,6 +370,7 @@ enum MHI_PKT_TYPE { 
	MHI_PKT_TYPE_RSC_TX_EVENT = 0x28,

	MHI_PKT_TYPE_EE_EVENT = 0x40,

	MHI_PKT_TYPE_TSYNC_EVENT = 0x48,

	MHI_PKT_TYPE_BW_REQ_EVENT = 0x50,

	MHI_PKT_TYPE_STALE_EVENT, /* internal event */

};

drivers/bus/mhi/core/mhi_main.c

+19 −0
Original line number Diff line number Diff line
@@ -1124,6 +1124,25 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl, 
			local_rp->ptr, local_rp->dword[0], local_rp->dword[1]);



		switch (type) {

		case MHI_PKT_TYPE_BW_REQ_EVENT:

		{

			struct mhi_link_info *link_info;



			link_info = &mhi_cntrl->mhi_link_info;

			write_lock_irq(&mhi_cntrl->pm_lock);

			link_info->target_link_speed =

				MHI_TRE_GET_EV_LINKSPEED(local_rp);

			link_info->target_link_width =

				MHI_TRE_GET_EV_LINKWIDTH(local_rp);

			write_unlock_irq(&mhi_cntrl->pm_lock);

			MHI_VERB(

				 "Received BW_REQ with link speed:0x%x width:0x%x\n",

				 link_info->target_link_speed,

				 link_info->target_link_width);

			mhi_cntrl->status_cb(mhi_cntrl, mhi_cntrl->priv_data,

					     MHI_CB_BW_REQ);

			break;

		}

		case MHI_PKT_TYPE_STATE_CHANGE_EVENT:

		{

			enum mhi_dev_state new_state;

drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c

+1 −4
Original line number Diff line number Diff line
@@ -2262,10 +2262,7 @@ static void ipa_mpm_mhi_status_cb(struct mhi_device *mhi_dev, 
			IPA_MPM_DBG("Already out of lpm\n");

		}

		break;

	case MHI_CB_EE_RDDM:

	case MHI_CB_PENDING_DATA:

	case MHI_CB_SYS_ERROR:

	case MHI_CB_FATAL_ERROR:

	default:

		IPA_MPM_ERR("unexpected event %d\n", mhi_cb);

		break;

	}

include/linux/mhi.h

+16 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ struct mhi_buf_info; 
 * @MHI_CB_EE_RDDM: MHI device entered RDDM execution enviornment

 * @MHI_CB_SYS_ERROR: MHI device enter error state (may recover)

 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error

 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device

 */

enum MHI_CB {

	MHI_CB_IDLE,
@@ -39,6 +40,7 @@ enum MHI_CB { 
	MHI_CB_EE_RDDM,

	MHI_CB_SYS_ERROR,

	MHI_CB_FATAL_ERROR,

	MHI_CB_BW_REQ,

};



/**
@@ -115,6 +117,16 @@ enum mhi_dev_state { 
	MHI_STATE_MAX,

};



/**

 * struct mhi_link_info - bw requirement

 * target_link_speed - as defined by TLS bits in LinkControl reg

 * target_link_width - as defined by NLW bits in LinkStatus reg

 */

struct mhi_link_info {

	unsigned int target_link_speed;

	unsigned int target_link_width;

};



/**

 * struct image_info - firmware and rddm table table

 * @mhi_buf - Contain device firmware and rddm table
@@ -164,6 +176,7 @@ struct image_info { 
 * @pm_state: Power management state

 * @ee: MHI device execution environment

 * @dev_state: MHI STATE

 * @mhi_link_info: requested link bandwidth by device

 * @status_cb: CB function to notify various power states to but master

 * @link_status: Query link status in case of abnormal value read from device

 * @runtime_get: Async runtime resume function
@@ -255,6 +268,9 @@ struct mhi_controller { 
	spinlock_t transition_lock;

	spinlock_t wlock;



	/* target bandwidth info */

	struct mhi_link_info mhi_link_info;



	/* debug counters */

	u32 M0, M2, M3;