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Commit e476d312 authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Thomas Gleixner
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mips/loongson/smp: Convert to hotplug state machine 



Install the callbacks via the state machine.

[ tglx: Reuse the MIPS_SOC_PREPARE state ]

Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160906170457.32393-17-bigeasy@linutronix.de


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent dd6d7c6f

arch/mips/loongson64/loongson-3/smp.c

+8 −26
Original line number Diff line number Diff line
@@ -677,7 +677,7 @@ void play_dead(void) 
	play_dead_at_ckseg1(state_addr);

}



void loongson3_disable_clock(int cpu)

static int loongson3_disable_clock(unsigned int cpu)

{

	uint64_t core_id = cpu_data[cpu].core;

	uint64_t package_id = cpu_data[cpu].package;
@@ -688,9 +688,10 @@ void loongson3_disable_clock(int cpu) 
		if (!(loongson_sysconf.workarounds & WORKAROUND_CPUHOTPLUG))

			LOONGSON_FREQCTRL(package_id) &= ~(1 << (core_id * 4 + 3));

	}

	return 0;

}



void loongson3_enable_clock(int cpu)

static int loongson3_enable_clock(unsigned int cpu)

{

	uint64_t core_id = cpu_data[cpu].core;

	uint64_t package_id = cpu_data[cpu].package;
@@ -701,34 +702,15 @@ void loongson3_enable_clock(int cpu) 
		if (!(loongson_sysconf.workarounds & WORKAROUND_CPUHOTPLUG))

			LOONGSON_FREQCTRL(package_id) |= 1 << (core_id * 4 + 3);

	}

}



#define CPU_POST_DEAD_FROZEN	(CPU_POST_DEAD | CPU_TASKS_FROZEN)

static int loongson3_cpu_callback(struct notifier_block *nfb,

	unsigned long action, void *hcpu)

{

	unsigned int cpu = (unsigned long)hcpu;



	switch (action) {

	case CPU_POST_DEAD:

	case CPU_POST_DEAD_FROZEN:

		pr_info("Disable clock for CPU#%d\n", cpu);

		loongson3_disable_clock(cpu);

		break;

	case CPU_UP_PREPARE:

	case CPU_UP_PREPARE_FROZEN:

		pr_info("Enable clock for CPU#%d\n", cpu);

		loongson3_enable_clock(cpu);

		break;

	}



	return NOTIFY_OK;

	return 0;

}



static int register_loongson3_notifier(void)

{

	hotcpu_notifier(loongson3_cpu_callback, 0);

	return 0;

	return cpuhp_setup_state_nocalls(CPUHP_MIPS_SOC_PREPARE,

					 "mips/loongson:prepare",

					 loongson3_enable_clock,

					 loongson3_disable_clock);

}

early_initcall(register_loongson3_notifier);