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Commit e454a05d authored by Jesse Barnes's avatar Jesse Barnes Committed by Daniel Vetter
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drm/i915/vlv: use correct units for rc6 residency v2 

We need to use the clock control reg to figure out how many CZ clks are in
30ns and use that as the basis for our RC6 residency calculations.

v2: use ULL everywhere for consistency (Chris)
    factor out bias for clarity (Chris)

References: https://bugs.freedesktop.org/show_bug.cgi?id=69692


Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 49798eb2

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -1805,6 +1805,9 @@ 
 */

#define HSW_CXT_TOTAL_SIZE		(17 * PAGE_SIZE)



#define VLV_CLK_CTL2			0x101104

#define   CLK_CTL2_CZCOUNT_30NS_SHIFT	28



/*

 * Overlay regs

 */

drivers/gpu/drm/i915/i915_sysfs.c

+20 −2
Original line number Diff line number Diff line
@@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg) 
{

	struct drm_i915_private *dev_priv = dev->dev_private;

	u64 raw_time; /* 32b value may overflow during fixed point math */

	u64 units = 128ULL, div = 100000ULL, bias = 100ULL;



	if (!intel_enable_rc6(dev))

		return 0;



	raw_time = I915_READ(reg) * 128ULL;

	return DIV_ROUND_UP_ULL(raw_time, 100000);

	/* On VLV, residency time is in CZ units rather than 1.28us */

	if (IS_VALLEYVIEW(dev)) {

		u32 clkctl2;



		clkctl2 = I915_READ(VLV_CLK_CTL2) >>

			CLK_CTL2_CZCOUNT_30NS_SHIFT;

		if (!clkctl2) {

			WARN(!clkctl2, "bogus CZ count value");

			return 0;

		}

		units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);

		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)

			units <<= 8;



		div = 1000000ULL * bias;

	}



	raw_time = I915_READ(reg) * units;

	return DIV_ROUND_UP_ULL(raw_time, div);

}



static ssize_t