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Commit e32faa30 authored by Thierry Reding's avatar Thierry Reding Committed by Bjorn Helgaas
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PCI: tegra: Remove misleading PHYS_OFFSET 



BARs are disabled when the size register is 0, so it's misleading to write
a base address into the start register.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 56e75e2a

drivers/pci/host/pci-tegra.c

+1 −1
Original line number Diff line number Diff line
@@ -771,7 +771,7 @@ static void tegra_pcie_setup_translations(struct tegra_pcie *pcie) 
	afi_writel(pcie, 0, AFI_FPCI_BAR5);



	/* map all upstream transactions as uncached */

	afi_writel(pcie, PHYS_OFFSET, AFI_CACHE_BAR0_ST);

	afi_writel(pcie, 0, AFI_CACHE_BAR0_ST);

	afi_writel(pcie, 0, AFI_CACHE_BAR0_SZ);

	afi_writel(pcie, 0, AFI_CACHE_BAR1_ST);

	afi_writel(pcie, 0, AFI_CACHE_BAR1_SZ);