clk: qcom: camcc-sm8150: update pll2 config control register value



Update the config_ctl_val for pll2 to match the latest hardware
guidelines.  This reduces jitter.

Change-Id: I5a273d7c063403849eca5fe71d802229c6dec343
Signed-off-by: David Collins <collinsd@codeaurora.org>

parent 159dc458

drivers/clk/qcom/camcc-sm8150.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -287,7 +287,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll1_out_even = {
		static const struct alpha_pll_config cam_cc_pll2_config = {
		.l = 0x32,
		.alpha = 0x0,
		.config_ctl_val = 0x10000927,
		.config_ctl_val = 0x10000807,
		.config_ctl_hi_val = 0x00000011,
		.config_ctl_hi1_val = 0x04300142,
		.test_ctl_val = 0x04000400,