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Commit e281fcaa authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson
Browse files

drm/i915: report correct render clock frequencies on SNB 



Fix up the debug file to report the right frequencies.  On SNB, we program
the PCU with a frequency ratio, which is multiplied by 100MHz on the CPU
side.  But GFX only runs at half that, so report it as such to avoid
confusion.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarKeith Packard <keithp@keithp.com>
parent 48898b03

drivers/gpu/drm/i915/i915_debugfs.c

+4 −4
Original line number Diff line number Diff line
@@ -892,7 +892,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) 
		seq_printf(m, "Render p-state limit: %d\n",

			   rp_state_limits & 0xff);

		seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>

						GEN6_CAGF_SHIFT) * 100);

						GEN6_CAGF_SHIFT) * 50);

		seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &

			   GEN6_CURICONT_MASK);

		seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
@@ -908,15 +908,15 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) 


		max_freq = (rp_state_cap & 0xff0000) >> 16;

		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",

			   max_freq * 100);

			   max_freq * 50);



		max_freq = (rp_state_cap & 0xff00) >> 8;

		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",

			   max_freq * 100);

			   max_freq * 50);



		max_freq = rp_state_cap & 0xff;

		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",

			   max_freq * 100);

			   max_freq * 50);



		__gen6_gt_force_wake_put(dev_priv);

	} else {

drivers/gpu/drm/i915/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -6930,7 +6930,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) 
		DRM_ERROR("timeout waiting for pcode mailbox to finish\n");

	if (pcu_mbox & (1<<31)) { /* OC supported */

		max_freq = pcu_mbox & 0xff;

		DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 100);

		DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50);

	}



	/* In units of 100MHz */