Loading arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -312,8 +312,12 @@ label = "kgsl-gmu"; compatible = "qcom,gpu-gmu"; reg = <0x2c6a000 0x30000>, <0xb200000 0x300000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_reg"; reg = <0x2c6a000 0x30000>, <0xb280000 0x10000>, <0xb480000 0x10000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_cfg", "kgsl_gmu_pdc_seq"; interrupts = <0 304 0>, <0 305 0>; interrupt-names = "kgsl_hfi_irq", "kgsl_gmu_irq"; Loading arch/arm64/boot/dts/qcom/sm8150-v2.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,15 @@ }; }; &gmu { reg = <0x2c6a000 0x30000>, <0xb290000 0x10000>, <0xb490000 0x10000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_cfg", "kgsl_gmu_pdc_seq"; }; /* NPU overrides */ &msm_npu { iommus = <&apps_smmu 0x1081 0x400>; Loading Loading
arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -312,8 +312,12 @@ label = "kgsl-gmu"; compatible = "qcom,gpu-gmu"; reg = <0x2c6a000 0x30000>, <0xb200000 0x300000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_reg"; reg = <0x2c6a000 0x30000>, <0xb280000 0x10000>, <0xb480000 0x10000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_cfg", "kgsl_gmu_pdc_seq"; interrupts = <0 304 0>, <0 305 0>; interrupt-names = "kgsl_hfi_irq", "kgsl_gmu_irq"; Loading
arch/arm64/boot/dts/qcom/sm8150-v2.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,15 @@ }; }; &gmu { reg = <0x2c6a000 0x30000>, <0xb290000 0x10000>, <0xb490000 0x10000>; reg-names = "kgsl_gmu_reg", "kgsl_gmu_pdc_cfg", "kgsl_gmu_pdc_seq"; }; /* NPU overrides */ &msm_npu { iommus = <&apps_smmu 0x1081 0x400>; Loading