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Commit e170db3c authored by Enric Balletbo i Serra's avatar Enric Balletbo i Serra Committed by Tony Lindgren
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ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.



At this moment all supported boards use same NAND chip, so has more sense
move the GPMC and NAND configuration to the omap3-igep.dtsi common place.

Signed-off-by: default avatarEnric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: default avatarJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 86f9abb6
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+49 −0
Original line number Diff line number Diff line
@@ -128,6 +128,55 @@
	};
};

&gpmc {
	nand@0,0 {
		linux,mtd-name= "micron,mt29c4g96maz";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "SPL";
			reg = <0 0x100000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x100000 0x180000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x280000 0x100000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x380000 0x300000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0x1f980000>;
		};
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
+0 −47
Original line number Diff line number Diff line
@@ -209,53 +209,6 @@
	ranges = <0 0 0x00000000 0x1000000>,	/* CS0: 16MB for NAND */
		 <5 0 0x2c000000 0x01000000>;

	nand@0,0 {
		linux,mtd-name= "micron,mt29c4g96maz";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "SPL";
			reg = <0 0x100000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x100000 0x180000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x280000 0x100000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x380000 0x300000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0x1f980000>;
		};
	};

	ethernet@gpmc {
		pinctrl-names = "default";
		pinctrl-0 = <&smsc9221_pins>;
+0 −51
Original line number Diff line number Diff line
@@ -65,57 +65,6 @@
	};
};

&gpmc {
	ranges = <0 0 0x00000000 0x1000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		linux,mtd-name= "micron,mt29c4g96maz";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "SPL";
			reg = <0 0x100000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x100000 0x180000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x280000 0x100000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x380000 0x300000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0x1f980000>;
		};
	};
};

&uart2 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart2_pins>;