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Commit e0f8864f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynq-soc-for-4.2' of https://github.com/Xilinx/linux-xlnx into next/soc 

Merge "arm: Xilinx Zynq SoC patches for v4.2" from Michal Simek:

- Change SoC reset path
- Fix SLCR unlock scheme

* tag 'zynq-soc-for-4.2' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Drop use of slcr_unlock in zynq_slcr_system_restart
  ARM: zynq: Use restart_handler mechanism for slcr reset
parents 80f3e655 ef6ca1a8

arch/arm/mach-zynq/common.c

+0 −6
Original line number Diff line number Diff line
@@ -190,11 +190,6 @@ static void __init zynq_irq_init(void) 
	irqchip_init();

}



static void zynq_system_reset(enum reboot_mode mode, const char *cmd)

{

	zynq_slcr_system_reset();

}



static const char * const zynq_dt_match[] = {

	"xlnx,zynq-7000",

	NULL
@@ -212,5 +207,4 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 
	.init_time	= zynq_timer_init,

	.dt_compat	= zynq_dt_match,

	.reserve	= zynq_memory_init,

	.restart	= zynq_system_reset,

MACHINE_END

arch/arm/mach-zynq/common.h

+0 −1
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ void zynq_secondary_startup(void); 


extern int zynq_slcr_init(void);

extern int zynq_early_slcr_init(void);

extern void zynq_slcr_system_reset(void);

extern void zynq_slcr_cpu_stop(int cpu);

extern void zynq_slcr_cpu_start(int cpu);

extern bool zynq_slcr_cpu_state_read(int cpu);

arch/arm/mach-zynq/slcr.c

+19 −9
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
 */



#include <linux/io.h>

#include <linux/reboot.h>

#include <linux/mfd/syscon.h>

#include <linux/of_address.h>

#include <linux/regmap.h>
@@ -92,19 +93,20 @@ u32 zynq_slcr_get_device_id(void) 
}



/**

 * zynq_slcr_system_reset - Reset the entire system.

 * zynq_slcr_system_restart - Restart the entire system.

 *

 * @nb:		Pointer to restart notifier block (unused)

 * @action:	Reboot mode (unused)

 * @data:	Restart handler private data (unused)

 *

 * Return:	0 always

 */

void zynq_slcr_system_reset(void)

static

int zynq_slcr_system_restart(struct notifier_block *nb,

			     unsigned long action, void *data)

{

	u32 reboot;



	/*

	 * Unlock the SLCR then reset the system.

	 * Note that this seems to require raw i/o

	 * functions or there's a lockup?

	 */

	zynq_slcr_unlock();



	/*

	 * Clear 0x0F000000 bits of reboot status register to workaround

	 * the FSBL not loading the bitstream after soft-reboot
@@ -113,8 +115,14 @@ void zynq_slcr_system_reset(void) 
	zynq_slcr_read(&reboot, SLCR_REBOOT_STATUS_OFFSET);

	zynq_slcr_write(reboot & 0xF0FFFFFF, SLCR_REBOOT_STATUS_OFFSET);

	zynq_slcr_write(1, SLCR_PS_RST_CTRL_OFFSET);

	return 0;

}



static struct notifier_block zynq_slcr_restart_nb = {

	.notifier_call	= zynq_slcr_system_restart,

	.priority	= 192,

};



/**

 * zynq_slcr_cpu_start - Start cpu

 * @cpu:	cpu number
@@ -219,6 +227,8 @@ int __init zynq_early_slcr_init(void) 
	/* unlock the SLCR so that registers can be changed */

	zynq_slcr_unlock();



	register_restart_handler(&zynq_slcr_restart_nb);



	pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);



	of_node_put(np);