Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e07dc63b authored by Joel Stanley's avatar Joel Stanley Committed by David S. Miller
Browse files

net/faraday: Configure old MDIO interface on Aspeed SoCs



The Aspeed SoCs have a new MDIO interface as an option in the G4 and G5
SoCs. The old one is still available, so select it in order to remain
compatible with the ftgmac100 driver.

Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 08c9c126
Loading
Loading
Loading
Loading
+9 −0
Original line number Original line Diff line number Diff line
@@ -1252,12 +1252,21 @@ static int ftgmac100_setup_mdio(struct net_device *netdev)
	struct ftgmac100 *priv = netdev_priv(netdev);
	struct ftgmac100 *priv = netdev_priv(netdev);
	struct platform_device *pdev = to_platform_device(priv->dev);
	struct platform_device *pdev = to_platform_device(priv->dev);
	int i, err = 0;
	int i, err = 0;
	u32 reg;


	/* initialize mdio bus */
	/* initialize mdio bus */
	priv->mii_bus = mdiobus_alloc();
	priv->mii_bus = mdiobus_alloc();
	if (!priv->mii_bus)
	if (!priv->mii_bus)
		return -EIO;
		return -EIO;


	if (of_machine_is_compatible("aspeed,ast2400") ||
	    of_machine_is_compatible("aspeed,ast2500")) {
		/* This driver supports the old MDIO interface */
		reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR);
		reg &= ~FTGMAC100_REVR_NEW_MDIO_INTERFACE;
		iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR);
	};

	priv->mii_bus->name = "ftgmac100_mdio";
	priv->mii_bus->name = "ftgmac100_mdio";
	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
	snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d",
		 pdev->name, pdev->id);
		 pdev->name, pdev->id);
+5 −0
Original line number Original line Diff line number Diff line
@@ -133,6 +133,11 @@
#define FTGMAC100_DMAFIFOS_RXDMA_REQ		(1 << 30)
#define FTGMAC100_DMAFIFOS_RXDMA_REQ		(1 << 30)
#define FTGMAC100_DMAFIFOS_TXDMA_REQ		(1 << 31)
#define FTGMAC100_DMAFIFOS_TXDMA_REQ		(1 << 31)


/*
 * Feature Register
 */
#define FTGMAC100_REVR_NEW_MDIO_INTERFACE	BIT(31)

/*
/*
 * Receive buffer size register
 * Receive buffer size register
 */
 */