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Commit e027333d authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "UPSTREAM commit 'aec88a64' 11/30"

parents 0885c924 8775940e

Documentation/devicetree/bindings/media/video/msm-cam-cpas.txt

+11 −0
Original line number Diff line number Diff line
@@ -169,6 +169,16 @@ First Level Node - CAM CPAS device 
  Definition: Bool property specifying whether Clients are connected

	through CAMNOC for AXI access.



- qcom,cam-cx-ipeak:

  Usage: optional

  Value type: <phandle bit>

	phandle - phandle of CX Ipeak device node

	bit     - Every bit corresponds to a client of CX Ipeak

  Definition: CX Ipeak is a mitigation scheme which throttles camera frequency

	if all the clients are running at their respective threshold

	frequencies to limit CX peak current.

	driver in the relevant register.



===================================================================

Third Level Node - CAM AXI Port properties

===================================================================
@@ -226,6 +236,7 @@ Example: 
		src-clock-name = "slow_ahb_clk_src";

		clock-rates = <0 0 0 0 80000000 0>;

		clock-cntl-level = "turbo";

		qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;

		control-camnoc-axi-clk;

		camnoc-bus-width = <32>;

		camnoc-axi-clk-bw-margin-perc = <10>;

Documentation/devicetree/bindings/media/video/msm-cam-icp.txt

+11 −0
Original line number Diff line number Diff line
@@ -153,6 +153,16 @@ and name of firmware image. 
  Value type: <u32>

  Definition: UBWC configuration.



- qcom,cam-cx-ipeak:

  Usage: optional

  Value type: <phandle bit>

	phandle - phandle of CX Ipeak device node

	bit     - Every bit corresponds to a client of CX Ipeak

  Definition: CX Ipeak is a mitigation scheme which throttles camera frequency

	if all the clients are running at their respective threshold

	frequencies to limit CX peak current.

	driver in the relevant register.



Examples:

a5: qcom,a5@ac00000 {

	cell-index = <0>;
@@ -244,6 +254,7 @@ qcom,ipe1 { 
		<0 0 0 0 600000000>;

	clock-cntl-level = "lowsvs", "svs",

		"svs_l1", "nominal", "turbo";

	qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;

};



bps: qcom,bps {

Documentation/devicetree/bindings/media/video/msm-cam-vfe.txt

+11 −0
Original line number Diff line number Diff line
@@ -96,6 +96,16 @@ Optional properties: 
  Value type: <string>

  Definition: Enable/Disable clk rate control.



- qcom,cam-cx-ipeak:

  Usage: optional

  Value type: <phandle bit>

	phandle - phandle of CX Ipeak device node

	bit     - Every bit corresponds to a client of CX Ipeak

  Definition: CX Ipeak is a mitigation scheme which throttles camera frequency

	if all the clients are running at their respective threshold

	frequencies to limit CX peak current.

	driver in the relevant register.



Example:

	qcom,vfe0@acaf000 {

		cell-index = <0>;
@@ -130,5 +140,6 @@ Example: 
		clock-names-option = "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;

		clock-rates-option = <600000000>;

		qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;

		status = "ok";

	};

arch/arm64/boot/dts/qcom/sdmmagpie-camera-sensor-idp.dtsi

+43 −0
Original line number Diff line number Diff line
@@ -306,6 +306,49 @@ 
		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};



	qcom,cam-sensor@4 {

		cell-index = <4>;

		compatible = "qcom,cam-sensor";

		reg = <0x04>;

		csiphy-sd-index = <0>;

		sensor-position-roll = <90>;

		sensor-position-pitch = <0>;

		sensor-position-yaw = <180>;

		led-flash-src = <&led_flash_rear>;

		eeprom-src = <&eeprom_rear>;

		actuator-src = <&actuator_rear>;

		cam_vio-supply = <&pm8009_l7>;

		cam_vana-supply = <&pm8009_l5>;

		cam_vdig-supply = <&pm8009_l2>;

		cam_clk-supply = <&titan_top_gdsc>;

		regulator-names = "cam_vio", "cam_vana", "cam_vdig",

			"cam_clk";

		rgltr-cntrl-support;

		rgltr-min-voltage = <1800000 2800000 1050000 0>;

		rgltr-max-voltage = <1800000 2800000 1050000 0>;

		rgltr-load-current = <0 80000 105000 0>;

		gpio-no-mux = <0>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cam_sensor_mclk0_active

				&cam_sensor_rear_active>;

		pinctrl-1 = <&cam_sensor_mclk0_suspend

				&cam_sensor_rear_suspend>;

		gpios = <&tlmm 13 0>,

			<&pm8009_gpios 1 0>;

		gpio-reset = <1>;

		gpio-req-tbl-num = <0 1>;

		gpio-req-tbl-flags = <1 0>;

		gpio-req-tbl-label = "CAMIF_MCLK0",

					"CAM_RESET0";

		sensor-mode = <0>;

		cci-master = <0>;

		status = "ok";

		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;

		clock-names = "cam_clk";

		clock-cntl-level = "turbo";

		clock-rates = <24000000>;

	};

};

arch/arm64/boot/dts/qcom/sdmmagpie-camera.dtsi

+25 −18
Original line number Diff line number Diff line
@@ -765,6 +765,7 @@ 
		num-a5 = <1>;

		num-ipe = <2>;

		num-bps = <1>;

		icp_pc_en;

		status = "ok";

	};
@@ -1105,25 +1106,30 @@ 
		client-names =

			"csiphy0", "csiphy1", "csiphy2", "csiphy3",

			"cci0", "cci1",

			"csid0", "csid1", "csid2", "csid3",

			"ife0", "ife1", "ife2", "ife3",

			"csid0", "csid1", "csid2",

			"iferdi0", "ifenrdi0", "iferdi1", "ifenrdi1",

			"iferdi2", "ifenrdi2",

			"ipe0", "ipe1", "cam-cdm-intf0", "cpas-cdm0",

			"bps0", "icp0", "jpeg-dma0", "jpeg-enc0",

			"fd0", "lrmecpas0";

		client-axi-port-names =

			"cam_hf_1", "cam_hf_2", "cam_hf_1", "cam_hf_2",

			"cam_sf_1", "cam_sf_1",

			"cam_hf_1", "cam_hf_2", "cam_hf_1", "cam_hf_2",

			"cam_hf_1", "cam_hf_2", "cam_hf_1", "cam_hf_2",

			"cam_sf_1", "cam_sf_1", "cam_sf_1", "cam_sf_1",

			"cam_sf_1", "cam_sf_1", "cam_sf_1", "cam_sf_1",

			"cam_sf_1", "cam_sf_1";

			"cam_hf_0", "cam_hf_0", "cam_hf_0", "cam_hf_0",

			"cam_sf_0", "cam_sf_0",

			"cam_hf_0", "cam_hf_0", "cam_hf_0",

			"cam_hf_1", "cam_hf_0", "cam_hf_1", "cam_hf_0",

			"cam_hf_1", "cam_hf_0",

			"cam_sf_0", "cam_sf_0", "cam_sf_0", "cam_sf_0",

			"cam_sf_0", "cam_sf_1", "cam_sf_0", "cam_sf_0",

			"cam_sf_0", "cam_sf_0";

		client-bus-camnoc-based;

		qcom,axi-port-list {

			qcom,axi-port1 {

				qcom,axi-port-name = "cam_hf_1";

				/* this port is clubbed port of two ports

				 * (READ and PIX ports)

				 */

				qcom,axi-port-name = "cam_hf_0";

				qcom,axi-port-mnoc {

					qcom,msm-bus,name = "cam_hf_1_mnoc";

					qcom,msm-bus,name = "cam_hf_0_mnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;
@@ -1134,7 +1140,7 @@ 
					MSM_BUS_SLAVE_EBI_CH0 0 0>;

				};

				qcom,axi-port-camnoc {

					qcom,msm-bus,name = "cam_hf_1_camnoc";

					qcom,msm-bus,name = "cam_hf_0_camnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;
@@ -1146,9 +1152,10 @@ 
				};

			};

			qcom,axi-port2 {

				qcom,axi-port-name = "cam_hf_2";

				/* this port is for rdi only WR*/

				qcom,axi-port-name = "cam_hf_1";

				qcom,axi-port-mnoc {

					qcom,msm-bus,name = "cam_hf_2_mnoc";

					qcom,msm-bus,name = "cam_hf_1_mnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;
@@ -1159,7 +1166,7 @@ 
					MSM_BUS_SLAVE_EBI_CH0 0 0>;

				};

				qcom,axi-port-camnoc {

					qcom,msm-bus,name = "cam_hf_2_camnoc";

					qcom,msm-bus,name = "cam_hf_1_camnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;
@@ -1171,9 +1178,9 @@ 
				};

			};

			qcom,axi-port3 {

				qcom,axi-port-name = "cam_sf_1";

				qcom,axi-port-name = "cam_sf_0";

				qcom,axi-port-mnoc {

					qcom,msm-bus,name = "cam_sf_1_mnoc";

					qcom,msm-bus,name = "cam_sf_0_mnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;
@@ -1184,7 +1191,7 @@ 
					MSM_BUS_SLAVE_EBI_CH0 0 0>;

				};

				qcom,axi-port-camnoc {

					qcom,msm-bus,name = "cam_sf_1_camnoc";

					qcom,msm-bus,name = "cam_sf_0_camnoc";

					qcom,msm-bus-vector-dyn-vote;

					qcom,msm-bus,num-cases = <2>;

					qcom,msm-bus,num-paths = <1>;