ath9k: fix few register offsets for AR9330

#define AR_PHY_65NM_CH2_RXTX1       0x16900

#define AR_PHY_65NM_CH2_RXTX2       0x16904

#define AR_CH0_TOP2 (AR_SREV_9485(ah) ? 0x00016284 : 0x0001628c)

#define AR_CH0_TOP2		(AR_SREV_9300(ah) ? 0x1628c : 0x16284)

#define AR_CH0_TOP2_XPABIASLVL		0xf000

#define AR_CH0_TOP2_XPABIASLVL_S	12

#define AR_CH0_XTAL		(AR_SREV_9485(ah) ? 0x16290 : 0x16294)

#define AR_CH0_XTAL		(AR_SREV_9300(ah) ? 0x16294 : 0x16290)

#define AR_CH0_XTAL_CAPINDAC	0x7f000000

#define AR_CH0_XTAL_CAPINDAC_S	24

#define AR_CH0_XTAL_CAPOUTDAC	0x00fe0000