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Commit df73b7f8 authored by Dmitry Lifshitz's avatar Dmitry Lifshitz Committed by Tony Lindgren
Browse files

ARM: dts: cm-t3x: add NAND support



CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to
GPMC bus.

Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for
all three modules.

NAND timings are calculated to be safe for CM-T3x devices as it works
now in non DT boot (in this case the timings are updated by U-Boot).

Update GPMC ranges in boards DT files to include all connected devices.

Signed-off-by: default avatarDmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: default avatarIgor Grinberg <grinberg@compulab.co.il>
Acked-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 7a03f2c0
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+58 −0
Original line number Diff line number Diff line
@@ -259,3 +259,61 @@
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
};

&gpmc {
	ranges = <0 0 0x00000000 0x01000000>;

	nand@0,0 {
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		ti,nand-ecc-opt = "sw";

		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <120>;
		gpmc,cs-wr-off-ns = <120>;

		gpmc,adv-on-ns = <0>;
		gpmc,adv-rd-off-ns = <120>;
		gpmc,adv-wr-off-ns = <120>;

		gpmc,we-on-ns = <6>;
		gpmc,we-off-ns = <90>;

		gpmc,oe-on-ns = <6>;
		gpmc,oe-off-ns = <90>;

		gpmc,page-burst-access-ns = <6>;
		gpmc,access-ns = <72>;
		gpmc,cycle2cycle-delay-ns = <60>;

		gpmc,rd-cycle-ns = <120>;
		gpmc,wr-cycle-ns = <120>;
		gpmc,wr-access-ns = <186>;
		gpmc,wr-data-mux-bus-ns = <90>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "xloader";
			reg = <0 0x80000>;
		};
		partition@0x80000 {
			label = "uboot";
			reg = <0x80000 0x1e0000>;
		};
		partition@0x260000 {
			label = "uboot environment";
			reg = <0x260000 0x40000>;
		};
		partition@0x2a0000 {
			label = "linux";
			reg = <0x2a0000 0x400000>;
		};
		partition@0x6a0000 {
			label = "rootfs";
			reg = <0x6a0000 0x1f880000>;
		};
	};
};
+2 −1
Original line number Diff line number Diff line
@@ -50,7 +50,8 @@
#include "omap-gpmc-smsc911x.dtsi"

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>;
	ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */

	smsc1: ethernet@gpmc {
		compatible = "smsc,lan9221", "smsc,lan9115";
+4 −0
Original line number Diff line number Diff line
@@ -69,3 +69,7 @@
	};
};

&gpmc {
	ranges = <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};
+3 −7
Original line number Diff line number Diff line
@@ -26,14 +26,10 @@
	};
};

/*
 * The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
 * SB-T35 baseboard respectively.
 * This setting includes both chips in SBC-T3530 board device tree.
 */
&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>,
		 <4 0 0x2d000000 0x01000000>;
	ranges = <5 0 0x2c000000 0x01000000>,	/* CM-T3x30 SMSC9x Eth */
		 <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};

&mmc1 {
+3 −2
Original line number Diff line number Diff line
@@ -27,8 +27,9 @@
};

&gpmc {
	ranges = <5 0 0x2c000000 0x01000000>,
		 <4 0 0x2d000000 0x01000000>;
	ranges = <5 0 0x2c000000 0x01000000>,	/* CM-T3x30 SMSC9x Eth */
		 <4 0 0x2d000000 0x01000000>,	/* SB-T35 SMSC9x Eth */
		 <0 0 0x00000000 0x01000000>;	/* CM-T3x NAND */
};

&dss {