Loading drivers/power/supply/qcom/qg-core.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -210,6 +210,7 @@ enum qg_wa_flags { QG_VBAT_LOW_WA = BIT(0), QG_VBAT_LOW_WA = BIT(0), QG_RECHARGE_SOC_WA = BIT(1), QG_RECHARGE_SOC_WA = BIT(1), QG_CLK_ADJUST_WA = BIT(2), QG_CLK_ADJUST_WA = BIT(2), QG_PON_OCV_WA = BIT(3), }; }; Loading drivers/power/supply/qcom/qpnp-qg.c +33 −25 Original line number Original line Diff line number Diff line Loading @@ -2656,7 +2656,8 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) goto use_pon_ocv; goto use_pon_ocv; if (!is_between(0, chip->dt.shutdown_temp_diff, if (!is_between(0, chip->dt.shutdown_temp_diff, abs(shutdown[SDAM_TEMP] - batt_temp))) abs(shutdown[SDAM_TEMP] - batt_temp)) && (shutdown[SDAM_TEMP] < 0 || batt_temp < 0)) goto use_pon_ocv; goto use_pon_ocv; if ((chip->dt.shutdown_soc_threshold != -EINVAL) && if ((chip->dt.shutdown_soc_threshold != -EINVAL) && Loading @@ -2672,6 +2673,7 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) use_pon_ocv: use_pon_ocv: if (use_pon_ocv == true) { if (use_pon_ocv == true) { if (chip->wa_flags & QG_PON_OCV_WA) { if (ocv[S3_LAST_OCV].ocv_raw == FIFO_V_RESET_VAL) { if (ocv[S3_LAST_OCV].ocv_raw == FIFO_V_RESET_VAL) { if (!ocv[SDAM_PON_OCV].ocv_uv) { if (!ocv[SDAM_PON_OCV].ocv_uv) { strlcpy(ocv_type, "S7_PON_SOC", 20); strlcpy(ocv_type, "S7_PON_SOC", 20); Loading @@ -2691,7 +2693,8 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) ocv_uv = ocv[SDAM_PON_OCV].ocv_uv; ocv_uv = ocv[SDAM_PON_OCV].ocv_uv; } } } else { } else { if (ocv[S3_LAST_OCV].ocv_uv >= ocv[S7_PON_OCV].ocv_uv) { if (ocv[S3_LAST_OCV].ocv_uv >= ocv[S7_PON_OCV].ocv_uv) { strlcpy(ocv_type, "S3_LAST_SOC", 20); strlcpy(ocv_type, "S3_LAST_SOC", 20); ocv_uv = ocv[S3_LAST_OCV].ocv_uv; ocv_uv = ocv[S3_LAST_OCV].ocv_uv; } else { } else { Loading @@ -2699,6 +2702,11 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) ocv_uv = ocv[S7_PON_OCV].ocv_uv; ocv_uv = ocv[S7_PON_OCV].ocv_uv; } } } } } else { /* Use S7 PON OCV */ strlcpy(ocv_type, "S7_PON_SOC", 20); ocv_uv = ocv[S7_PON_OCV].ocv_uv; } ocv_uv = CAP(QG_MIN_OCV_UV, QG_MAX_OCV_UV, ocv_uv); ocv_uv = CAP(QG_MIN_OCV_UV, QG_MAX_OCV_UV, ocv_uv); rc = lookup_soc_ocv(&pon_soc, ocv_uv, batt_temp, false); rc = lookup_soc_ocv(&pon_soc, ocv_uv, batt_temp, false); Loading Loading @@ -2768,7 +2776,7 @@ static int qg_set_wa_flags(struct qpnp_qg *chip) { { switch (chip->pmic_rev_id->pmic_subtype) { switch (chip->pmic_rev_id->pmic_subtype) { case PMI632_SUBTYPE: case PMI632_SUBTYPE: chip->wa_flags |= QG_RECHARGE_SOC_WA; chip->wa_flags |= QG_RECHARGE_SOC_WA | QG_PON_OCV_WA; if (chip->pmic_rev_id->rev4 == PMI632_V1P0_REV4) if (chip->pmic_rev_id->rev4 == PMI632_V1P0_REV4) chip->wa_flags |= QG_VBAT_LOW_WA; chip->wa_flags |= QG_VBAT_LOW_WA; break; break; Loading Loading
drivers/power/supply/qcom/qg-core.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -210,6 +210,7 @@ enum qg_wa_flags { QG_VBAT_LOW_WA = BIT(0), QG_VBAT_LOW_WA = BIT(0), QG_RECHARGE_SOC_WA = BIT(1), QG_RECHARGE_SOC_WA = BIT(1), QG_CLK_ADJUST_WA = BIT(2), QG_CLK_ADJUST_WA = BIT(2), QG_PON_OCV_WA = BIT(3), }; }; Loading
drivers/power/supply/qcom/qpnp-qg.c +33 −25 Original line number Original line Diff line number Diff line Loading @@ -2656,7 +2656,8 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) goto use_pon_ocv; goto use_pon_ocv; if (!is_between(0, chip->dt.shutdown_temp_diff, if (!is_between(0, chip->dt.shutdown_temp_diff, abs(shutdown[SDAM_TEMP] - batt_temp))) abs(shutdown[SDAM_TEMP] - batt_temp)) && (shutdown[SDAM_TEMP] < 0 || batt_temp < 0)) goto use_pon_ocv; goto use_pon_ocv; if ((chip->dt.shutdown_soc_threshold != -EINVAL) && if ((chip->dt.shutdown_soc_threshold != -EINVAL) && Loading @@ -2672,6 +2673,7 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) use_pon_ocv: use_pon_ocv: if (use_pon_ocv == true) { if (use_pon_ocv == true) { if (chip->wa_flags & QG_PON_OCV_WA) { if (ocv[S3_LAST_OCV].ocv_raw == FIFO_V_RESET_VAL) { if (ocv[S3_LAST_OCV].ocv_raw == FIFO_V_RESET_VAL) { if (!ocv[SDAM_PON_OCV].ocv_uv) { if (!ocv[SDAM_PON_OCV].ocv_uv) { strlcpy(ocv_type, "S7_PON_SOC", 20); strlcpy(ocv_type, "S7_PON_SOC", 20); Loading @@ -2691,7 +2693,8 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) ocv_uv = ocv[SDAM_PON_OCV].ocv_uv; ocv_uv = ocv[SDAM_PON_OCV].ocv_uv; } } } else { } else { if (ocv[S3_LAST_OCV].ocv_uv >= ocv[S7_PON_OCV].ocv_uv) { if (ocv[S3_LAST_OCV].ocv_uv >= ocv[S7_PON_OCV].ocv_uv) { strlcpy(ocv_type, "S3_LAST_SOC", 20); strlcpy(ocv_type, "S3_LAST_SOC", 20); ocv_uv = ocv[S3_LAST_OCV].ocv_uv; ocv_uv = ocv[S3_LAST_OCV].ocv_uv; } else { } else { Loading @@ -2699,6 +2702,11 @@ static int qg_determine_pon_soc(struct qpnp_qg *chip) ocv_uv = ocv[S7_PON_OCV].ocv_uv; ocv_uv = ocv[S7_PON_OCV].ocv_uv; } } } } } else { /* Use S7 PON OCV */ strlcpy(ocv_type, "S7_PON_SOC", 20); ocv_uv = ocv[S7_PON_OCV].ocv_uv; } ocv_uv = CAP(QG_MIN_OCV_UV, QG_MAX_OCV_UV, ocv_uv); ocv_uv = CAP(QG_MIN_OCV_UV, QG_MAX_OCV_UV, ocv_uv); rc = lookup_soc_ocv(&pon_soc, ocv_uv, batt_temp, false); rc = lookup_soc_ocv(&pon_soc, ocv_uv, batt_temp, false); Loading Loading @@ -2768,7 +2776,7 @@ static int qg_set_wa_flags(struct qpnp_qg *chip) { { switch (chip->pmic_rev_id->pmic_subtype) { switch (chip->pmic_rev_id->pmic_subtype) { case PMI632_SUBTYPE: case PMI632_SUBTYPE: chip->wa_flags |= QG_RECHARGE_SOC_WA; chip->wa_flags |= QG_RECHARGE_SOC_WA | QG_PON_OCV_WA; if (chip->pmic_rev_id->rev4 == PMI632_V1P0_REV4) if (chip->pmic_rev_id->rev4 == PMI632_V1P0_REV4) chip->wa_flags |= QG_VBAT_LOW_WA; chip->wa_flags |= QG_VBAT_LOW_WA; break; break; Loading