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Commit deb27519 authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
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perf/x86/intel: Fix LBR callstack issue caused by FREEZE_LBRS_ON_PMI 



This patch fixes an issue which introduced by commit
1a78d937 ("perf/x86/intel: Streamline
LBR MSR handling in PMI").

The old patch not only avoids writing LBR_SELECT MSR in PMI, but also
avoids updating lbr_select variable. So in PMI, FREEZE_LBRS_ON_PMI bit
is always mistakenly set for IA32_DEBUGCTLMSR MSR, which causes
superfluous increase/decrease of LBR_TOS when collecting LBR callstack.

Reported-by: default avatarMilian Wolff <mail@milianw.de>
Signed-off-by: default avatarKan Liang <kan.liang@intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1439815051-8616-1-git-send-email-kan.liang@intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent d2878d64

arch/x86/kernel/cpu/perf_event_intel_lbr.c

+2 −3
Original line number Diff line number Diff line
@@ -151,10 +151,9 @@ static void __intel_pmu_lbr_enable(bool pmi) 
	 * No need to reprogram LBR_SELECT in a PMI, as it

	 * did not change.

	 */

	if (cpuc->lbr_sel && !pmi) {

	lbr_select = cpuc->lbr_sel->config;

	if (cpuc->lbr_sel && !pmi)

		wrmsrl(MSR_LBR_SELECT, lbr_select);

	}



	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);

	orig_debugctl = debugctl;