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Commit de93b63a authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: enable IP HW CH by default and disable for sm8150-sdx50"

parents 9ea664bf c3258f74

arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi

+58 −18
Original line number Diff line number Diff line
@@ -324,6 +324,29 @@ 
				mhi,ee = <2>;

			};



			mhi_chan@100 {

				reg = <100>;

				label = "IP_HW0";

				mhi,num-elements = <512>;

				mhi,event-ring = <4>;

				mhi,chan-dir = <1>;

				mhi,data-type = <1>;

				mhi,doorbell-mode = <3>;

				mhi,ee = <2>;

				mhi,db-mode-switch;

			};



			mhi_chan@101 {

				reg = <101>;

				label = "IP_HW0";

				mhi,num-elements = <512>;

				mhi,event-ring = <5>;

				mhi,chan-dir = <2>;

				mhi,data-type = <1>;

				mhi,doorbell-mode = <3>;

				mhi,ee = <2>;

			};



			mhi_chan@104 {

				reg = <104>;

				label = "IP_HW_OFFLOAD_0";
@@ -379,27 +402,24 @@ 
			};



			mhi_event@4 {

				mhi,num-elements = <0>;

				mhi,intmod = <0>;

				mhi,num-elements = <1024>;

				mhi,intmod = <5>;

				mhi,msi = <5>;

				mhi,chan = <104>;

				mhi,chan = <100>;

				mhi,priority = <1>;

				mhi,brstmode = <3>;

				mhi,hw-ev;

				mhi,client-manage;

				mhi,offload;

			};



			mhi_event@5 {

				mhi,num-elements = <0>;

				mhi,intmod = <0>;

				mhi,num-elements = <1024>;

				mhi,intmod = <5>;

				mhi,msi = <6>;

				mhi,chan = <105>;

				mhi,chan = <101>;

				mhi,priority = <1>;

				mhi,brstmode = <3>;

				mhi,hw-ev;

				mhi,client-manage;

				mhi,offload;

			};



			mhi_netdev_0: mhi_rmnet@0 {
@@ -732,6 +752,29 @@ 
				mhi,ee = <2>;

			};



			mhi_chan@100 {

				reg = <100>;

				label = "IP_HW0";

				mhi,num-elements = <512>;

				mhi,event-ring = <4>;

				mhi,chan-dir = <1>;

				mhi,data-type = <1>;

				mhi,doorbell-mode = <3>;

				mhi,ee = <2>;

				mhi,db-mode-switch;

			};



			mhi_chan@101 {

				reg = <101>;

				label = "IP_HW0";

				mhi,num-elements = <512>;

				mhi,event-ring = <5>;

				mhi,chan-dir = <2>;

				mhi,data-type = <1>;

				mhi,doorbell-mode = <3>;

				mhi,ee = <2>;

			};



			mhi_chan@104 {

				reg = <104>;

				label = "IP_HW_OFFLOAD_0";
@@ -787,27 +830,24 @@ 
			};



			mhi_event@4 {

				mhi,num-elements = <0>;

				mhi,intmod = <0>;

				mhi,num-elements = <1024>;

				mhi,intmod = <5>;

				mhi,msi = <5>;

				mhi,chan = <104>;

				mhi,chan = <100>;

				mhi,priority = <1>;

				mhi,brstmode = <3>;

				mhi,hw-ev;

				mhi,client-manage;

				mhi,offload;

			};



			mhi_event@5 {

				mhi,num-elements = <0>;

				mhi,intmod = <0>;

				mhi,num-elements = <1024>;

				mhi,intmod = <5>;

				mhi,msi = <6>;

				mhi,chan = <105>;

				mhi,chan = <101>;

				mhi,priority = <1>;

				mhi,brstmode = <3>;

				mhi,hw-ev;

				mhi,client-manage;

				mhi,offload;

			};



			mhi_netdev_2: mhi_rmnet@0 {

arch/arm64/boot/dts/qcom/sm8150-sdx50m.dtsi

+89 −10
Original line number Diff line number Diff line
@@ -45,8 +45,89 @@ 
&mhi_0 {

	esoc-names = "mdm";

	esoc-0 = <&mdm3>;

	qcom,smmu-cfg = <0x1d>;

	qcom,addr-win = <0x0 0x20000000 0x0 0x3fffffff>;

	qcom,smmu-cfg = <0>;

	memory-region = <&mhi_mem>;

	mhi,use-bb;

	mhi,buffer-len = <0x8000>;

	qcom,addr-win = <0x0 0xa0000000 0x0 0xa4bfffff>;



	mhi_chan@1 {

		mhi,num-elements = <32>;

	};



	mhi_chan@11 {

		mhi,num-elements = <32>;

	};



	mhi_chan@21 {

		mhi,num-elements = <32>;

	};



	mhi_chan@100 {

		status = "disabled";

	};



	mhi_chan@101 {

		status = "disabled";

	};



	mhi_event@4 {

		mhi,num-elements = <0>;

		mhi,intmod = <0>;

		mhi,msi = <5>;

		mhi,chan = <104>;

		mhi,priority = <1>;

		mhi,brstmode = <3>;

		mhi,hw-ev;

		mhi,client-manage;

		mhi,offload;

	};



	mhi_event@5 {

		mhi,num-elements = <0>;

		mhi,intmod = <0>;

		mhi,msi = <6>;

		mhi,chan = <105>;

		mhi,priority = <1>;

		mhi,brstmode = <3>;

		mhi,hw-ev;

		mhi,client-manage;

		mhi,offload;

	};

};



&mhi_1 {

	mhi_chan@100 {

		status = "disabled";

	};



	mhi_chan@101 {

		status = "disabled";

	};



	mhi_event@4 {

		mhi,num-elements = <0>;

		mhi,intmod = <0>;

		mhi,msi = <5>;

		mhi,chan = <104>;

		mhi,priority = <1>;

		mhi,brstmode = <3>;

		mhi,hw-ev;

		mhi,client-manage;

		mhi,offload;

	};



	mhi_event@5 {

		mhi,num-elements = <0>;

		mhi,intmod = <0>;

		mhi,msi = <6>;

		mhi,chan = <105>;

		mhi,priority = <1>;

		mhi,brstmode = <3>;

		mhi,hw-ev;

		mhi,client-manage;

		mhi,offload;

	};

};



&tlmm {
@@ -67,8 +148,6 @@ 
};



&pcie1 {

	dma-coherent;



	pinctrl-0 = <&pcie1_clkreq_default

		&pcie1_perst_default

		&pcie1_sdx50m_wake_default>;
@@ -77,8 +156,6 @@ 
&soc {

	imp: qcom,ipa-mhi-proxy {

		compatible = "qcom,ipa-mhi-proxy";

		qcom,ctrl-iova = <0x00010000 0x0FFF0000>;

		qcom,data-iova = <0x10000000 0x0FFFFFFF>;

		qcom,mhi-chdb-base = <0x40300300>;

		qcom,mhi-erdb-base = <0x40300700>;

	};
@@ -97,9 +174,11 @@ 
		reg = <0x0 0xa1000000 0x0 0x02c00000>;

	};



	pil_pcie_mem: pil_pcie_mem_region@a3c00000 {

		compatible = "removed-dma-pool";

	mhi_mem: mhi_region {

		 compatible = "shared-dma-pool";

		 alloc-ranges = <0x0 0xa3c00000 0x0 0x01000000>;

		 alignment = <0x0 0x400000>;

		 size = <0x0 0x01000000>;

		 no-map;

		reg = <0x0 0xa3c00000 0x0 0x01000000>;

	};

};