Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit de238cf7 authored by Bao D. Nguyen's avatar Bao D. Nguyen
Browse files

phy: ufs: Update UFS PHY calibration sequence 



Update the UFS PHY calibration sequence as per the UFS PHY
Hardware Programming Guide v7.0.

Change-Id: I4e329078a2605ec00029389fdb86fbae8881d67c
Signed-off-by: default avatarBao D. Nguyen <nguyenb@codeaurora.org>
parent 8588eafd

drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4.h

+7 −3
Original line number Diff line number Diff line
@@ -129,6 +129,7 @@ 
#define QSERDES_RX0_AC_JTAG_ENABLE			RX_OFF(0, 0x68)

#define QSERDES_RX0_UCDR_FO_GAIN			RX_OFF(0, 0x08)

#define QSERDES_RX0_UCDR_SO_GAIN			RX_OFF(0, 0x14)

#define QSERDES_RX0_AC_JTAG_MODE			RX_OFF(0, 0x78)



#define QSERDES_RX1_SIGDET_LVL				RX_OFF(1, 0x120)

#define QSERDES_RX1_SIGDET_CNTRL			RX_OFF(1, 0x11C)
@@ -165,6 +166,7 @@ 
#define QSERDES_RX1_AC_JTAG_ENABLE			RX_OFF(1, 0x68)

#define QSERDES_RX1_UCDR_FO_GAIN			RX_OFF(1, 0x08)

#define QSERDES_RX1_UCDR_SO_GAIN			RX_OFF(1, 0x14)

#define QSERDES_RX1_AC_JTAG_MODE			RX_OFF(1, 0x78)



#define UFS_PHY_RX_LINECFG_DISABLE_BIT		BIT(1)
@@ -245,7 +247,7 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = { 
	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_10_HIGH3, 0x3B),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_RX_MODE_10_HIGH4, 0xB1),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_MIN_HIBERN8_TIME, 0xFF),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_SIGDET_CTRL2, 0x6F),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_SIGDET_CTRL2, 0x6D),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_LARGE_AMP_DRV_LVL, 0x0A),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_SMALL_AMP_DRV_LVL, 0x02),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_MID_TERM_CTRL1, 0x43),
@@ -257,7 +259,8 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = { 
	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_HS_GEAR_BAND, 0x06),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_TX_HSGEAR_CAPABILITY, 0x03),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_HSGEAR_CAPABILITY, 0x03),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_AC_JTAG_ENABLE, 0x00),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_AC_JTAG_ENABLE, 0x01),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_AC_JTAG_MODE, 0x01),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_UCDR_FO_GAIN, 0x0C),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX0_UCDR_SO_GAIN, 0x04),

};
@@ -302,7 +305,8 @@ static struct ufs_qcom_phy_calibration phy_cal_table_2nd_lane[] = { 
	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_10_HIGH3, 0x3B),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_RX_MODE_10_HIGH4, 0xB1),

	UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_MULTI_LANE_CTRL1, 0x02),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_AC_JTAG_ENABLE, 0x00),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_AC_JTAG_ENABLE, 0x01),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_AC_JTAG_MODE, 0x01),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_UCDR_FO_GAIN, 0x0C),

	UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX1_UCDR_SO_GAIN, 0x04),

};